JP5547380B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP5547380B2 JP5547380B2 JP2008118516A JP2008118516A JP5547380B2 JP 5547380 B2 JP5547380 B2 JP 5547380B2 JP 2008118516 A JP2008118516 A JP 2008118516A JP 2008118516 A JP2008118516 A JP 2008118516A JP 5547380 B2 JP5547380 B2 JP 5547380B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76876—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for deposition from the gas phase, e.g. CVD
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
- C23C16/08—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides
- C23C16/14—Deposition of only one other metal element
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/02—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material
- C23C28/023—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material only coatings of metal elements only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Chemical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
Description
反応室内に搬入された前記半導体基板を330℃以上400℃以下に加熱し、かつB2H6ガス及びSiH4ガスの少なくとも一方並びにタングステン含有ガスを前記反応室内に導入することにより、前記孔の内部に第1のタングステン膜を成膜する工程と、
前記反応室内にH2ガス及び不活性ガスの少なくとも一方を導入し、かつ30秒以上の時間をかけて前記半導体基板を370℃以上410℃以下に昇温する工程と、
タングステン含有ガスを前記反応室内に導入することにより、
前記第1のタングステン膜上に第2のタングステン膜を成膜する工程と、
を備える半導体装置の製造方法が提供される。
102 素子分離膜
120 トランジスタ
122 シリサイド層
124 シリサイド層
126 シリサイド層
140 トランジスタ
142 シリサイド層
144 シリサイド層
146 シリサイド層
200 層間絶縁膜
221 孔
222 孔
223 孔
224 孔
225 孔
230 バリア膜
240 第2のタングステン膜
242 第1のタングステン膜
Claims (6)
- 半導体基板の表面より上に位置する絶縁膜に孔を形成する工程と、
反応室内に搬入された前記半導体基板を330℃以上400℃以下に加熱し、かつB2H6ガス及びSiH4ガスの少なくとも一方並びにタングステン含有ガス、及びキャリアガスを前記反応室内に導入することにより、前記孔の内部に第1のタングステン膜を成膜する工程と、
前記反応室内にH2ガス及び不活性ガスの一方又は両方からなるガスを導入し、かつ30秒以上の時間をかけて前記半導体基板を370℃以上410℃以下に昇温する工程と、
タングステン含有ガス、H 2 ガス、及びキャリアガスを前記反応室内に導入することにより、前記第1のタングステン膜上に第2のタングステン膜を成膜する工程と、
を備え、
前記半導体基板を昇温する工程において、前記孔の内部に成膜を行わない
半導体装置の製造方法。 - 請求項1に記載の半導体装置の製造方法において、
前記第1のタングステン膜を成膜する工程において、前記半導体基板を330℃以上360℃以下に加熱する半導体装置の製造方法。 - 請求項1又は2に記載の半導体装置の製造方法において、
前記半導体基板を昇温する工程における昇温速度は0.5℃/秒以上2.5℃/秒以下である半導体装置の製造方法。 - 請求項1〜3のいずれか一つに記載の半導体装置の製造方法において、
前記半導体基板を昇温する工程において、40秒以上の時間をかけて前記半導体基板を昇温する半導体装置の製造方法。 - 請求項1〜4のいずれか一つに記載の半導体装置の製造方法において、
前記第1のタングステン膜を成膜する工程及び前記第2のタングステン膜を成膜する工程において、前記第1のタングステン膜及び前記第2のタングステン膜は前記絶縁膜の表面の上方にも成膜され、
前記第2のタングステン膜を成膜する工程の後に、前記絶縁膜の表面の上方に位置する前記第1のタングステン膜及び前記第2のタングステン膜を除去する工程を備える半導体装置の製造方法。 - 請求項1〜5のいずれか一つに記載の半導体装置の製造方法において、
前記第1のタングステン膜を成膜する工程において、SiH4ガス、タングステン含有ガス、及びキャリアガスを前記反応室内に導入する半導体装置の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008118516A JP5547380B2 (ja) | 2008-04-30 | 2008-04-30 | 半導体装置の製造方法 |
TW098100644A TWI393215B (zh) | 2008-04-30 | 2009-01-09 | 半導體裝置之製造方法 |
US12/351,063 US7842609B2 (en) | 2008-04-30 | 2009-01-09 | Method for manufacturing semiconductor device |
KR1020090004577A KR101037058B1 (ko) | 2008-04-30 | 2009-01-20 | 반도체 디바이스 제조 방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008118516A JP5547380B2 (ja) | 2008-04-30 | 2008-04-30 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2009267309A JP2009267309A (ja) | 2009-11-12 |
JP5547380B2 true JP5547380B2 (ja) | 2014-07-09 |
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JP2008118516A Expired - Fee Related JP5547380B2 (ja) | 2008-04-30 | 2008-04-30 | 半導体装置の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7842609B2 (ja) |
JP (1) | JP5547380B2 (ja) |
KR (1) | KR101037058B1 (ja) |
TW (1) | TWI393215B (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5710529B2 (ja) | 2011-09-22 | 2015-04-30 | 株式会社東芝 | 半導体装置及びその製造方法 |
KR102365114B1 (ko) * | 2015-08-28 | 2022-02-21 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5273609A (en) * | 1990-09-12 | 1993-12-28 | Texas Instruments Incorporated | Method and apparatus for time-division plasma chopping in a multi-channel plasma processing equipment |
JP3246046B2 (ja) * | 1993-03-23 | 2002-01-15 | ソニー株式会社 | 高融点金属膜の堆積方法 |
JP3231914B2 (ja) * | 1993-08-18 | 2001-11-26 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
JPH1187268A (ja) * | 1997-09-09 | 1999-03-30 | Matsushita Electron Corp | 半導体装置、半導体装置の製造方法、および半導体装置の製造装置 |
US6099904A (en) | 1997-12-02 | 2000-08-08 | Applied Materials, Inc. | Low resistivity W using B2 H6 nucleation step |
KR100477813B1 (ko) * | 1997-12-27 | 2005-06-17 | 주식회사 하이닉스반도체 | 반도체장치의텅스텐금속배선형성방법 |
US6218298B1 (en) * | 1999-05-19 | 2001-04-17 | Infineon Technologies North America Corp. | Tungsten-filled deep trenches |
US6309966B1 (en) | 1999-09-03 | 2001-10-30 | Motorola, Inc. | Apparatus and method of a low pressure, two-step nucleation tungsten deposition |
US6403478B1 (en) * | 2000-08-31 | 2002-06-11 | Chartered Semiconductor Manufacturing Company | Low pre-heat pressure CVD TiN process |
US7141494B2 (en) * | 2001-05-22 | 2006-11-28 | Novellus Systems, Inc. | Method for reducing tungsten film roughness and improving step coverage |
JP3956049B2 (ja) * | 2003-03-07 | 2007-08-08 | 東京エレクトロン株式会社 | タングステン膜の形成方法 |
KR100555514B1 (ko) * | 2003-08-22 | 2006-03-03 | 삼성전자주식회사 | 저 저항 텅스텐 배선을 갖는 반도체 메모리 소자 및 그제조방법 |
JP4945937B2 (ja) | 2005-07-01 | 2012-06-06 | 東京エレクトロン株式会社 | タングステン膜の形成方法、成膜装置及び記憶媒体 |
KR100788602B1 (ko) * | 2006-09-29 | 2007-12-26 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 금속 배선 형성 방법 |
-
2008
- 2008-04-30 JP JP2008118516A patent/JP5547380B2/ja not_active Expired - Fee Related
-
2009
- 2009-01-09 US US12/351,063 patent/US7842609B2/en active Active
- 2009-01-09 TW TW098100644A patent/TWI393215B/zh active
- 2009-01-20 KR KR1020090004577A patent/KR101037058B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US20090275197A1 (en) | 2009-11-05 |
KR20090115042A (ko) | 2009-11-04 |
TW200945492A (en) | 2009-11-01 |
TWI393215B (zh) | 2013-04-11 |
JP2009267309A (ja) | 2009-11-12 |
US7842609B2 (en) | 2010-11-30 |
KR101037058B1 (ko) | 2011-05-26 |
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