JP5511813B2 - 静電放電に対する保護を有する放射放出半導体チップおよびその製造方法 - Google Patents
静電放電に対する保護を有する放射放出半導体チップおよびその製造方法 Download PDFInfo
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
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Description
− 活性領域を有する半導体積層体、特に、エピタキシャル積層体を備えている半導体ボディの(キャリア要素に面している)第1の主領域に、ミラー層が堆積されている、または半導体積層体内に形成されている(例えば、ブラッグミラーとして組み込まれている)。このミラー層は、半導体積層体において発生する放射の少なくとも一部分を半導体積層体に反射する。
− 半導体積層体の厚さは、20μm以下の範囲、特に10μm以下の範囲である。
− 半導体積層体は、少なくとも一領域が混合構造(intermixing structure)を有する少なくとも1つの半導体層を含んでおり、この混合構造によって、理想的には半導体積層体における近似的に光のエルゴード分布につながり、すなわち、この完全混合構造は、実質的にエルゴード的確率過程である散乱挙動を有する。
Claims (14)
- 放射放出半導体チップ(1)であって、キャリア(5)と、半導体積層体を有する半導体ボディ(2)と、を備えており、
− 前記半導体積層体が、放射を発生させるために設けられている活性領域(20)と、第1の半導体層(21)と、第2の半導体層(22)と、を備えており、
− 前記活性領域(20)は、前記第1の半導体層(21)と前記第2の半導体層(22)との間に配置されており、
− 前記第1の半導体層(21)は、前記キャリア(5)とは反対側の前記活性領域(20)の面に配置されており、
− 前記半導体ボディ(2)は、前記第2の半導体層(22)および前記活性領域(20)を貫いて前記第1の半導体層(21)まで延在している少なくとも1つの凹部(25)を備えており、
− 前記第1の半導体層(21)は第1の接続層(31)に導電接続されており、前記第1の接続層(31)は、前記凹部(25)の中に前記第1の半導体層(21)から前記キャリア(5)の方向に延在しており、
− 前記第1の接続層(31)は、保護ダイオード(4)を介して前記第2の半導体層(22)に電気的に接続されており、
前記活性領域(20)は、前記半導体チップ(1)の平面視において前記保護ダイオード(4)を完全に覆っている、
放射放出半導体チップ(1)。 - 前記第1の接続層(31)は、前記キャリア(5)と前記第2の半導体層(22)との間に少なくとも部分的に延在している、
請求項1に記載の放射放出半導体チップ。 - 前記保護ダイオード(4)はショットキーダイオードとして具体化されている、
請求項1または請求項2に記載の放射放出半導体チップ。 - 前記保護ダイオード(4)は、前記第2の半導体層(22)と前記第1の接続層(31)との間のショットキー接触によって形成されている、
請求項1から請求項3のいずれかに記載の放射放出半導体チップ。 - 前記第1の接続層(31)と前記第2の半導体層(22)との間に少なくとも部分的に第2の接続層(32)が配置されており、前記第2の接続層(32)は前記第2の半導体層(22)に導電接続されている、
請求項1から請求項4のいずれかに記載の放射放出半導体チップ。 - 前記保護ダイオード(4)は、前記第2の半導体層(22)と、前記第2の半導体層(22)に隣接している接合層(40)との間のショットキー接触によって形成されており、前記接合層(40)と前記第2の接続層(32)との間に絶縁層(7)が形成されている、
請求項5に記載の放射放出半導体チップ - 前記半導体ボディ(2)の前記半導体積層体の成長基板(200)が少なくとも部分的に除去されている、
請求項1から請求項6のいずれかに記載の放射放出半導体チップ。 - 前記第1の接続層(31)は、前記キャリア(5)と前記第2の半導体層(22)との間に少なくとも部分的に延在しており、
前記半導体ボディ(2)の前記半導体積層体の成長基板が少なくとも部分的に除去されており、
前記キャリア(5)は前記半導体積層体を機械的に安定化させる、
請求項1に記載の放射放出半導体チップ。 - LEDチップ、RCLEDチップ、またはレーザダイオードチップとして具体化されている、
請求項1から請求項8のいずれかに記載の放射放出半導体チップ。 - 放射放出半導体チップを製造する方法であって、
a) 放射を発生させるために設けられる活性領域(20)と、第1の半導体層(21)と、第2の半導体層(22)と、を備えている半導体積層体、を有する半導体ボディ(2)を形成するステップと、
b) 前記第2の半導体層(22)および前記活性領域(20)を貫いて前記第1の半導体層(21)の中まで延在している凹部(25)を前記半導体ボディ(2)に形成するステップと、
c) 前記半導体ボディ(2)の上に第1の接続層(31)を形成するステップであって、前記第1の接続層(31)は前記凹部(25)の中に延在しており、前記第1の接続層(31)は保護ダイオード(4)を介して前記第2の半導体層(22)に電気的に接続され、前記活性領域(20)は、前記半導体チップ(1)の平面視において前記保護ダイオード(4)を完全に覆っている、前記ステップと、
d) 前記半導体チップを完成させるステップと、
を含んでいる、方法。 - ステップc)の前に、前記第2の半導体層(22)の上に接合層(40)を形成し、前記接合層(40)は前記第2の半導体層(22)に隣接している、
請求項10に記載の方法。 - 前記第2の半導体層(22)の電気接触性を所定の方法で局所的に低下させる、
請求項11に記載の方法。 - 前記電気接触性を、灰化もしくはスパッタリング、またはその両方によって低下させる、
請求項12に記載の方法。 - 前記第1の接続層(31)と前記第2の半導体層(22)との間に少なくとも部分的に第2の接続層(32)が配置されており、前記第2の接続層(32)は前記第2の半導体層(22)に導電接続されており、
前記半導体ボディ(2)の一部分を除去することによって、前記第2の接続層(32)を露出させる、
請求項10から請求項13のいずれかに記載の方法。
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DE102008034560.1A DE102008034560B4 (de) | 2008-07-24 | 2008-07-24 | Strahlungsemittierender Halbleiterchip und Verfahren zur Herstellung eines strahlungsemittierenden Halbleiterchips |
DE102008034560.1 | 2008-07-24 | ||
PCT/DE2009/000885 WO2010009690A1 (de) | 2008-07-24 | 2009-06-25 | Strahlungemittierender halbleiterchip mit schutz gegen elektrostatische entladungen und entsprechendes herstellungsverfahren |
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JP2011528855A JP2011528855A (ja) | 2011-11-24 |
JP2011528855A5 JP2011528855A5 (ja) | 2012-08-09 |
JP5511813B2 true JP5511813B2 (ja) | 2014-06-04 |
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US (1) | US8710537B2 (ja) |
EP (2) | EP3128555B1 (ja) |
JP (1) | JP5511813B2 (ja) |
KR (2) | KR101632082B1 (ja) |
CN (1) | CN101971344B (ja) |
DE (1) | DE102008034560B4 (ja) |
WO (1) | WO2010009690A1 (ja) |
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US20120018763A1 (en) | 2012-01-26 |
DE102008034560A1 (de) | 2010-02-04 |
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US8710537B2 (en) | 2014-04-29 |
KR101632082B1 (ko) | 2016-06-20 |
EP2304799A1 (de) | 2011-04-06 |
KR20110031897A (ko) | 2011-03-29 |
CN101971344A (zh) | 2011-02-09 |
WO2010009690A1 (de) | 2010-01-28 |
JP2011528855A (ja) | 2011-11-24 |
EP2304799B1 (de) | 2016-10-26 |
EP3128555A1 (de) | 2017-02-08 |
KR101710849B1 (ko) | 2017-02-27 |
CN101971344B (zh) | 2012-10-17 |
EP3128555B1 (de) | 2021-08-18 |
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