JP5461323B2 - 半導体パッケージ基板の製造方法 - Google Patents
半導体パッケージ基板の製造方法 Download PDFInfo
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- JP5461323B2 JP5461323B2 JP2010145974A JP2010145974A JP5461323B2 JP 5461323 B2 JP5461323 B2 JP 5461323B2 JP 2010145974 A JP2010145974 A JP 2010145974A JP 2010145974 A JP2010145974 A JP 2010145974A JP 5461323 B2 JP5461323 B2 JP 5461323B2
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- wire bonding
- copper
- bonding pad
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- clad laminate
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- 239000000758 substrate Substances 0.000 title claims description 60
- 239000004065 semiconductor Substances 0.000 title claims description 51
- 238000004519 manufacturing process Methods 0.000 title claims description 35
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 84
- 238000007747 plating Methods 0.000 claims description 74
- 239000011889 copper foil Substances 0.000 claims description 70
- 238000000034 method Methods 0.000 claims description 45
- 238000005530 etching Methods 0.000 claims description 43
- 239000010931 gold Substances 0.000 claims description 28
- 229910000679 solder Inorganic materials 0.000 claims description 26
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 25
- 229910052737 gold Inorganic materials 0.000 claims description 25
- 229910052802 copper Inorganic materials 0.000 claims description 14
- 239000010949 copper Substances 0.000 claims description 14
- 238000010030 laminating Methods 0.000 claims description 10
- 238000004381 surface treatment Methods 0.000 claims description 8
- 239000010408 film Substances 0.000 description 41
- 238000010586 diagram Methods 0.000 description 17
- 239000004593 Epoxy Substances 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 3
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000013039 cover film Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 150000003071 polychlorinated biphenyls Chemical class 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229920002799 BoPET Polymers 0.000 description 1
- 239000005041 Mylar™ Substances 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 229920006015 heat resistant resin Polymers 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N phenol group Chemical group C1(=CC=CC=C1)O ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- BWHMMNNQKKPAPP-UHFFFAOYSA-L potassium carbonate Chemical compound [K+].[K+].[O-]C([O-])=O BWHMMNNQKKPAPP-UHFFFAOYSA-L 0.000 description 1
- 239000003755 preservative agent Substances 0.000 description 1
- 230000002335 preservative effect Effects 0.000 description 1
- 229910052708 sodium Inorganic materials 0.000 description 1
- 239000011734 sodium Substances 0.000 description 1
- 229910000029 sodium carbonate Inorganic materials 0.000 description 1
Images
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
- H05K1/0265—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0352—Differences between the conductors of different layers of a multilayer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09736—Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0369—Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Geometry (AREA)
- Wire Bonding (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
前記銅張積層板の両側に第1エッチングレジストを積層する第2工程と、
前記第1エッチングレジストに回路パターンを形成し、前記銅張積層板の両側の銅箔に、前記回路パターンによるワイヤボンディングパッドを含んだ回路とボールパッドを含んだ回路をそれぞれ形成した後、前記第1エッチングレジストを除去する第3工程と、
前記回路パターンの形成された銅張積層板に、前記ワイヤボンディングパッドとボールパッドが露出するように半田レジストを積層する第4工程と、
前記ワイヤボンディングパッドに金メッキを施し、前記ボールパッドに表面処理を施す第5工程とを含み、
前記第1工程の後、
前記銅張積層板の第1側に、半導体素子実装部および外層回路パターンを含むユニット領域を取り囲んでいるダミー領域に対応する部分が開放された第1メッキレジストを積層する工程と、
前記銅張積層板の第1側にメッキを施した後、前記第1メッキレジストを除去する工程とをさらに含むことを特徴とする、半導体パッケージ基板の製造方法が提供される。
前記銅張積層板の両側に第1エッチングレジストを積層する第2工程と、
前記第1エッチングレジストに回路パターンを形成し、前記銅張積層板の両側の銅箔に、前記回路パターンによるワイヤボンディングパッドを含んだ回路とボールパッドを含んだ回路をそれぞれ形成した後、前記第1エッチングレジストを除去する第3工程と、
前記回路パターンの形成された銅張積層板に、前記ワイヤボンディングパッドとボールパッドが露出するように半田レジストを積層する第4工程と、
前記ワイヤボンディングパッドに金メッキを施し、前記ボールパッドに表面処理を施す第5工程とを含み、
前記第1工程の後、
前記銅張積層板の第1側の回路層に形成されるメッキ引込み線と前記第2側の回路層に形成されるメッキ引込み線とを導通させるための導通ホールを形成する工程をさらに含むことを特徴とする、半導体パッケージ基板の製造方法が提供される。
その次、図5Hに示すように、エッチングレジストとして用いたドライフィルム508a、508bを除去した後、半田レジスト511a、511bを塗布、露光、現像、乾燥させる。
401a、401b、501a、501b 銅箔
302、402、502 絶縁層
304a、304b 回路層
304aa、408a、509a ワイヤボンディングパッド
304ac、408b、509b 金メッキ
304ba、409a、510a ボールパッド
304bc、409b、510b OSP表面処理
Claims (3)
- 銅張積層板を準備してワイヤボンディングパッド面の銅箔をハーフエッチングする第1工程と、
前記銅張積層板の両側に第1エッチングレジストを積層する第2工程と、
前記第1エッチングレジストに回路パターンを形成し、前記銅張積層板の両側の銅箔に、前記回路パターンによるワイヤボンディングパッドを含んだ回路とボールパッドを含んだ回路をそれぞれ形成した後、前記第1エッチングレジストを除去する第3工程と、
前記回路パターンの形成された銅張積層板に、前記ワイヤボンディングパッドとボールパッドが露出するように半田レジストを積層する第4工程と、
前記ワイヤボンディングパッドに金メッキを施し、前記ボールパッドに表面処理を施す第5工程とを含み、
前記第1工程の後、
前記銅張積層板の第1側に、半導体素子実装部および外層回路パターンを含むユニット領域を取り囲んでいるダミー領域に対応する部分が開放された第1メッキレジストを積層する工程と、
前記銅張積層板の第1側にメッキを施した後、前記第1メッキレジストを除去する工程とをさらに含むことを特徴とする、半導体パッケージ基板の製造方法。 - 銅張積層板を準備してワイヤボンディングパッド面の銅箔をハーフエッチングする第1工程と、
前記銅張積層板の両側に第1エッチングレジストを積層する第2工程と、
前記第1エッチングレジストに回路パターンを形成し、前記銅張積層板の両側の銅箔に、前記回路パターンによるワイヤボンディングパッドを含んだ回路とボールパッドを含んだ回路をそれぞれ形成した後、前記第1エッチングレジストを除去する第3工程と、
前記回路パターンの形成された銅張積層板に、前記ワイヤボンディングパッドとボールパッドが露出するように半田レジストを積層する第4工程と、
前記ワイヤボンディングパッドに金メッキを施し、前記ボールパッドに表面処理を施す第5工程とを含み、
前記第1工程の後、
前記銅張積層板の第1側の回路層に形成されるメッキ引込み線と前記第2側の回路層に形成されるメッキ引込み線とを導通させるための導通ホールを形成する工程をさらに含むことを特徴とする、半導体パッケージ基板の製造方法。 - 前記導通ホールは、前記半導体パッケージ基板のユニット領域と角部に形成されることを特徴とする、請求項2に記載の半導体パッケージ基板の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050090019A KR100722635B1 (ko) | 2005-09-27 | 2005-09-27 | 와이어 본딩 패드면과 볼패드면의 회로층이 다른 두께를갖는 반도체 패키지 기판 및 그 제조방법 |
KR10-2005-0090019 | 2005-09-27 |
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JP2006261175A Division JP4651597B2 (ja) | 2005-09-27 | 2006-09-26 | 半導体パッケージ基板 |
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JP2010258468A JP2010258468A (ja) | 2010-11-11 |
JP5461323B2 true JP5461323B2 (ja) | 2014-04-02 |
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JP2006261175A Expired - Fee Related JP4651597B2 (ja) | 2005-09-27 | 2006-09-26 | 半導体パッケージ基板 |
JP2010145974A Expired - Fee Related JP5461323B2 (ja) | 2005-09-27 | 2010-06-28 | 半導体パッケージ基板の製造方法 |
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JP2006261175A Expired - Fee Related JP4651597B2 (ja) | 2005-09-27 | 2006-09-26 | 半導体パッケージ基板 |
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Country | Link |
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US (2) | US7768116B2 (ja) |
JP (2) | JP4651597B2 (ja) |
KR (1) | KR100722635B1 (ja) |
CN (1) | CN100524724C (ja) |
TW (1) | TWI307142B (ja) |
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TWI367555B (en) * | 2007-03-21 | 2012-07-01 | Advanced Semiconductor Eng | Conversion substrate for leadframe and the method for making the same |
CN101399246B (zh) * | 2007-09-29 | 2011-12-28 | 欣兴电子股份有限公司 | 覆晶封装基板结构及其制法 |
KR100926675B1 (ko) * | 2007-10-01 | 2009-11-17 | 주식회사 심텍 | 보강테를 구비하는 인쇄회로기판 스트립 및 그 제조방법 |
KR101194549B1 (ko) * | 2009-06-12 | 2012-10-25 | 삼성전기주식회사 | 인쇄회로기판의 제조방법 |
TWI444123B (zh) * | 2012-02-16 | 2014-07-01 | Via Tech Inc | 線路板製作方法及線路板 |
TWI519219B (zh) * | 2012-10-29 | 2016-01-21 | 三星電機股份有限公司 | 印刷電路板及印刷電路板製造方法 |
CN104135815B (zh) * | 2013-05-03 | 2018-01-02 | 讯芯电子科技(中山)有限公司 | 一种防止金属焊垫被刮伤的电路板结构及制造方法 |
CN104703390B (zh) * | 2013-12-06 | 2017-12-26 | 鹏鼎控股(深圳)股份有限公司 | 电路板及其制作方法 |
CN104602457A (zh) * | 2015-01-01 | 2015-05-06 | 王定锋 | 一种制作线路板的新方法及其制作的线路板 |
CN106658966B (zh) * | 2016-12-06 | 2020-03-17 | 深圳崇达多层线路板有限公司 | 一种薄膜电阻内层蚀刻方法 |
CN109561602B (zh) * | 2017-09-27 | 2020-08-21 | 鹏鼎控股(深圳)股份有限公司 | 电路板及其制作方法 |
KR102596758B1 (ko) * | 2018-10-24 | 2023-11-03 | 삼성전자주식회사 | 반도체 패키지 |
KR102620864B1 (ko) * | 2018-11-23 | 2024-01-04 | 에스케이하이닉스 주식회사 | 반도체 패키지 및 제조 방법 |
CN110072340B (zh) * | 2019-05-31 | 2020-12-25 | 信丰卓思涵电子有限公司 | 一种同层鸳鸯铜线路板的制作方法 |
CN110267443A (zh) * | 2019-06-17 | 2019-09-20 | 江门崇达电路技术有限公司 | 一种具有阶梯线路的正片线路板的制作方法 |
JP6970230B2 (ja) * | 2020-03-24 | 2021-11-24 | 日東電工株式会社 | 配線回路基板集合体シート |
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JPS58168141A (ja) * | 1982-03-29 | 1983-10-04 | Mitsubishi Electric Corp | デイスプレイ装置 |
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JPH04268783A (ja) | 1991-02-25 | 1992-09-24 | Furukawa Electric Co Ltd:The | 複合回路基板 |
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-
2005
- 2005-09-27 KR KR1020050090019A patent/KR100722635B1/ko not_active IP Right Cessation
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2006
- 2006-07-28 TW TW095127731A patent/TWI307142B/zh not_active IP Right Cessation
- 2006-07-31 US US11/495,649 patent/US7768116B2/en not_active Expired - Fee Related
- 2006-08-18 CN CNB2006101116354A patent/CN100524724C/zh not_active Expired - Fee Related
- 2006-09-26 JP JP2006261175A patent/JP4651597B2/ja not_active Expired - Fee Related
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2010
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Also Published As
Publication number | Publication date |
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KR20070035320A (ko) | 2007-03-30 |
CN1941352A (zh) | 2007-04-04 |
US20070069360A1 (en) | 2007-03-29 |
CN100524724C (zh) | 2009-08-05 |
TW200713527A (en) | 2007-04-01 |
US8236690B2 (en) | 2012-08-07 |
JP2010258468A (ja) | 2010-11-11 |
US20100261348A1 (en) | 2010-10-14 |
JP2007096314A (ja) | 2007-04-12 |
JP4651597B2 (ja) | 2011-03-16 |
KR100722635B1 (ko) | 2007-05-28 |
US7768116B2 (en) | 2010-08-03 |
TWI307142B (en) | 2009-03-01 |
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