JP5372464B2 - 差動出力バッファ - Google Patents

差動出力バッファ Download PDF

Info

Publication number
JP5372464B2
JP5372464B2 JP2008268714A JP2008268714A JP5372464B2 JP 5372464 B2 JP5372464 B2 JP 5372464B2 JP 2008268714 A JP2008268714 A JP 2008268714A JP 2008268714 A JP2008268714 A JP 2008268714A JP 5372464 B2 JP5372464 B2 JP 5372464B2
Authority
JP
Japan
Prior art keywords
nmos transistor
gate
drain
source
differential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008268714A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010098590A (ja
JP2010098590A5 (enExample
Inventor
友資 藤山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MegaChips Corp
Original Assignee
MegaChips Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MegaChips Corp filed Critical MegaChips Corp
Priority to JP2008268714A priority Critical patent/JP5372464B2/ja
Publication of JP2010098590A publication Critical patent/JP2010098590A/ja
Publication of JP2010098590A5 publication Critical patent/JP2010098590A5/ja
Application granted granted Critical
Publication of JP5372464B2 publication Critical patent/JP5372464B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Amplifiers (AREA)
  • Logic Circuits (AREA)
JP2008268714A 2008-10-17 2008-10-17 差動出力バッファ Expired - Fee Related JP5372464B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008268714A JP5372464B2 (ja) 2008-10-17 2008-10-17 差動出力バッファ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008268714A JP5372464B2 (ja) 2008-10-17 2008-10-17 差動出力バッファ

Publications (3)

Publication Number Publication Date
JP2010098590A JP2010098590A (ja) 2010-04-30
JP2010098590A5 JP2010098590A5 (enExample) 2011-10-20
JP5372464B2 true JP5372464B2 (ja) 2013-12-18

Family

ID=42259953

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008268714A Expired - Fee Related JP5372464B2 (ja) 2008-10-17 2008-10-17 差動出力バッファ

Country Status (1)

Country Link
JP (1) JP5372464B2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9071243B2 (en) * 2011-06-30 2015-06-30 Silicon Image, Inc. Single ended configurable multi-mode driver
JP5771489B2 (ja) * 2011-09-15 2015-09-02 ルネサスエレクトロニクス株式会社 半導体装置
JP6140573B2 (ja) * 2012-09-03 2017-05-31 株式会社メガチップス 出力バッファ回路
JP6094747B2 (ja) * 2013-03-26 2017-03-15 セイコーエプソン株式会社 出力回路、半導体集積回路、振動デバイス、電子機器、および移動体
JP6399938B2 (ja) 2015-01-22 2018-10-03 株式会社メガチップス 差動出力バッファ
JP7031369B2 (ja) * 2018-02-28 2022-03-08 セイコーエプソン株式会社 出力回路、発振器及び電子機器
CN109842416B (zh) * 2018-12-31 2024-02-23 芯动微电子科技(珠海)有限公司 发送装置
CN111756366B (zh) * 2020-06-22 2024-03-08 复旦大学 应用于高速adc前端的cmos输入信号缓冲器

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08265127A (ja) * 1995-03-28 1996-10-11 Mitsubishi Electric Corp ゲート回路,及びディジタル集積回路
JP3644010B2 (ja) * 1999-03-29 2005-04-27 富士通株式会社 光送信回路
JP2002151599A (ja) * 2000-11-13 2002-05-24 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP2002368600A (ja) * 2001-06-08 2002-12-20 Mitsubishi Electric Corp プリエンファシス回路
JP2005123212A (ja) * 2003-09-11 2005-05-12 Ricoh Co Ltd 内部電源電位供給回路
JP4578316B2 (ja) * 2005-05-02 2010-11-10 ザインエレクトロニクス株式会社 送信装置
JP4811192B2 (ja) * 2006-08-24 2011-11-09 ソニー株式会社 駆動回路
JP2008182418A (ja) * 2007-01-24 2008-08-07 Sharp Corp 半導体集積回路

Also Published As

Publication number Publication date
JP2010098590A (ja) 2010-04-30

Similar Documents

Publication Publication Date Title
JP5372464B2 (ja) 差動出力バッファ
US7646220B2 (en) Reduced voltage subLVDS receiver
US7880512B2 (en) Output driver circuit
JP3967321B2 (ja) 半導体集積回路
US20020084840A1 (en) Feedback-type amplifier circuit and driver circuit
JP3949636B2 (ja) Lvdsドライバー回路
US9183808B2 (en) Level shift circuit with automatic timing control of charging transistors, and driver circuit having the same
US20110163791A1 (en) Output circuit and semiconductor device including pre-emphasis function
US20110199360A1 (en) Differential amplifier architecture adapted to input level conversion
JP2011223430A (ja) 半導体装置
JP4097149B2 (ja) 差動駆動回路およびそれを内蔵する電子機器
KR100882971B1 (ko) 엘 에스 아이 내부로부터의 데이터를 외부로 차동 출력하는 드라이버회로
CN101060317B (zh) 限幅电路和半导体装置
CN101009478B (zh) 差分信号接收器
JP3415508B2 (ja) ドライバ回路及びその出力安定化方法
US20100321360A1 (en) Differential signal receiving circuit and display apparatus
US20050068070A1 (en) I/O buffer with wide range voltage translator
JP3948446B2 (ja) 半導体装置
US10447246B1 (en) Low voltage differential signaling circuit
US8446163B2 (en) Test circuit and test method for testing differential input circuit
KR100535249B1 (ko) 레벨 쉬프터를 이용한 고속 동작 저전압 차동 신호 방식입력 버퍼
US6636109B2 (en) Amplification circuit with constant output voltage range
US7579911B2 (en) Semiconductor circuit
JP4841343B2 (ja) レシーバアンプ回路
US20250385677A1 (en) Swing regulation technique to improve line driver performance

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20110831

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110831

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20110831

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130326

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130402

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20130430

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20130516

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20130516

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20130620

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20130620

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130827

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130918

R150 Certificate of patent or registration of utility model

Ref document number: 5372464

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees