JP5363252B2 - 半導体集積回路 - Google Patents

半導体集積回路 Download PDF

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Publication number
JP5363252B2
JP5363252B2 JP2009207627A JP2009207627A JP5363252B2 JP 5363252 B2 JP5363252 B2 JP 5363252B2 JP 2009207627 A JP2009207627 A JP 2009207627A JP 2009207627 A JP2009207627 A JP 2009207627A JP 5363252 B2 JP5363252 B2 JP 5363252B2
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Japan
Prior art keywords
data
circuit
transmission
mode
output
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JP2009207627A
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Japanese (ja)
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JP2011061393A (ja
JP2011061393A5 (enExample
Inventor
雅泰 光明
洋一 飯塚
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Renesas Electronics Corp
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Renesas Electronics Corp
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Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2009207627A priority Critical patent/JP5363252B2/ja
Priority to US12/876,793 priority patent/US7999572B2/en
Priority to CN201010282293.9A priority patent/CN102024493B/zh
Priority to CN201410583551.5A priority patent/CN104375970B/zh
Publication of JP2011061393A publication Critical patent/JP2011061393A/ja
Priority to US13/172,199 priority patent/US8653851B2/en
Publication of JP2011061393A5 publication Critical patent/JP2011061393A5/ja
Application granted granted Critical
Publication of JP5363252B2 publication Critical patent/JP5363252B2/ja
Priority to US14/148,135 priority patent/US8907699B2/en
Priority to US14/537,452 priority patent/US9171592B2/en
Priority to US14/859,942 priority patent/US20160012878A1/en
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1066—Output synchronization
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1093—Input synchronization
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0005—Modifications of input or output impedance
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0038—System on Chip
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Databases & Information Systems (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Logic Circuits (AREA)
JP2009207627A 2009-09-09 2009-09-09 半導体集積回路 Active JP5363252B2 (ja)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP2009207627A JP5363252B2 (ja) 2009-09-09 2009-09-09 半導体集積回路
US12/876,793 US7999572B2 (en) 2009-09-09 2010-09-07 Semiconductor integrated circuit
CN201010282293.9A CN102024493B (zh) 2009-09-09 2010-09-09 半导体集成电路
CN201410583551.5A CN104375970B (zh) 2009-09-09 2010-09-09 半导体集成电路
US13/172,199 US8653851B2 (en) 2009-09-09 2011-06-29 Semiconductor integrated circuit
US14/148,135 US8907699B2 (en) 2009-09-09 2014-01-06 Semiconductor integrated circuit
US14/537,452 US9171592B2 (en) 2009-09-09 2014-11-10 Semiconductor integrate circuit
US14/859,942 US20160012878A1 (en) 2009-09-09 2015-09-21 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009207627A JP5363252B2 (ja) 2009-09-09 2009-09-09 半導体集積回路

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013184009A Division JP5588053B2 (ja) 2013-09-05 2013-09-05 半導体集積回路

Publications (3)

Publication Number Publication Date
JP2011061393A JP2011061393A (ja) 2011-03-24
JP2011061393A5 JP2011061393A5 (enExample) 2012-04-05
JP5363252B2 true JP5363252B2 (ja) 2013-12-11

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009207627A Active JP5363252B2 (ja) 2009-09-09 2009-09-09 半導体集積回路

Country Status (3)

Country Link
US (5) US7999572B2 (enExample)
JP (1) JP5363252B2 (enExample)
CN (2) CN104375970B (enExample)

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JP5390310B2 (ja) 2009-09-08 2014-01-15 ルネサスエレクトロニクス株式会社 半導体集積回路
JP5346259B2 (ja) 2009-09-08 2013-11-20 ルネサスエレクトロニクス株式会社 半導体集積回路
JP5363252B2 (ja) 2009-09-09 2013-12-11 ルネサスエレクトロニクス株式会社 半導体集積回路
JP5876271B2 (ja) * 2011-11-01 2016-03-02 ルネサスエレクトロニクス株式会社 メモリ制御装置
KR102034221B1 (ko) * 2013-03-11 2019-10-18 삼성전자주식회사 클록 신호 발생부를 포함하는 반도체 장치
KR102276914B1 (ko) 2013-10-24 2021-07-13 삼성전자주식회사 비디오 인코딩 장치 그리고 이의 구동 방법
US9524763B2 (en) 2014-06-12 2016-12-20 Qualcomm Incorporated Source-synchronous data transmission with non-uniform interface topology
KR20170007969A (ko) * 2015-07-13 2017-01-23 에스케이하이닉스 주식회사 고속 통신을 위한 인터페이스 회로 및 이를 포함하는 시스템
US10008273B2 (en) * 2016-06-13 2018-06-26 Sandisk Technologies Llc Cell current based bit line voltage
CN108305647B (zh) * 2017-01-11 2020-09-25 中芯国际集成电路制造(上海)有限公司 输出驱动器和存储器的读电路
KR102577999B1 (ko) * 2018-05-31 2023-09-14 에스케이하이닉스 주식회사 집적 회로
WO2022064548A1 (ja) * 2020-09-23 2022-03-31 キオクシア株式会社 半導体記憶装置及びメモリシステム

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JP5363252B2 (ja) 2009-09-09 2013-12-11 ルネサスエレクトロニクス株式会社 半導体集積回路

Also Published As

Publication number Publication date
JP2011061393A (ja) 2011-03-24
CN104375970A (zh) 2015-02-25
US20150055398A1 (en) 2015-02-26
US20110057722A1 (en) 2011-03-10
CN102024493B (zh) 2014-12-03
CN102024493A (zh) 2011-04-20
US7999572B2 (en) 2011-08-16
US8907699B2 (en) 2014-12-09
US20110255354A1 (en) 2011-10-20
US9171592B2 (en) 2015-10-27
US8653851B2 (en) 2014-02-18
US20160012878A1 (en) 2016-01-14
CN104375970B (zh) 2017-08-29
US20140119142A1 (en) 2014-05-01

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