JP5356883B2 - 補強材付き配線基板の製造方法 - Google Patents
補強材付き配線基板の製造方法 Download PDFInfo
- Publication number
- JP5356883B2 JP5356883B2 JP2009083770A JP2009083770A JP5356883B2 JP 5356883 B2 JP5356883 B2 JP 5356883B2 JP 2009083770 A JP2009083770 A JP 2009083770A JP 2009083770 A JP2009083770 A JP 2009083770A JP 5356883 B2 JP5356883 B2 JP 5356883B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- stiffener
- main surface
- reinforcing material
- divided
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Description
以下、本発明を補強材付き配線基板に具体化した第1の実施の形態を図面に基づき詳細に説明する。
[第2の実施の形態]
[第3の実施の形態]
21…チップ部品としてのICチップ
31,31A〜31D…補強材としてのスティフナ
35…開口部
36,36A〜36D…分割片
39,39A〜39D…スリット
40,40A…配線基板
41…基板主面
42…基板裏面
43〜46…樹脂絶縁層
51…導体層
52…主面側接続端子としての端子パッド
90…分割片集合体
91…支持フレーム
92…連結部
94…支持フィルム
95,95A…分割片形成素材
96…片側面
97…凹部
98…枠内面
99…枠外面
Claims (1)
- 基板主面及び基板裏面を有し、複数の樹脂絶縁層及び複数の導体層を積層してなる構造を有し、チップ部品を接続可能な複数の主面側接続端子が前記基板主面上に配設された板状の配線基板と、
前記基板主面側に接合され、前記複数の主面側接続端子を露出させる開口部が貫通形成され、スリットを介して分割された複数の分割片からなる、平面視で枠状の補強材と
を備えた補強材付き配線基板の製造方法であって、
前記複数の分割片を加工形成するための枠状かつ片側面にあらかじめ凹部が形成された分割片形成素材を使用し、前記分割片形成素材における前記片側面側を前記基板主面側に接合する接合工程と、
前記接合工程後において、前記分割片形成素材の前記凹部のある位置を加工して前記スリットを形成することにより、前記複数の分割片を形成する分割片形成工程とを含み、
前記凹部は、前記分割片形成素材の枠内面から枠外面にわたって延びるとともに、前記スリットよりも幅広の溝部である
ことを特徴とする補強材付き配線基板の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009083770A JP5356883B2 (ja) | 2009-03-30 | 2009-03-30 | 補強材付き配線基板の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009083770A JP5356883B2 (ja) | 2009-03-30 | 2009-03-30 | 補強材付き配線基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010238829A JP2010238829A (ja) | 2010-10-21 |
JP5356883B2 true JP5356883B2 (ja) | 2013-12-04 |
Family
ID=43092917
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009083770A Expired - Fee Related JP5356883B2 (ja) | 2009-03-30 | 2009-03-30 | 補強材付き配線基板の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5356883B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI576025B (zh) * | 2014-10-29 | 2017-03-21 | 矽品精密工業股份有限公司 | 基板結構及其製法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06177513A (ja) * | 1992-12-10 | 1994-06-24 | Tanaka Kikinzoku Kogyo Kk | 回路基板の製造方法 |
JP3309781B2 (ja) * | 1997-10-21 | 2002-07-29 | 日立電線株式会社 | テープBGA(Ball Grid Array )用スティフナの製造方法 |
JP2003110203A (ja) * | 2001-09-28 | 2003-04-11 | Kyocera Corp | 多数個取り配線基板およびその製造方法 |
JP2003297987A (ja) * | 2003-03-25 | 2003-10-17 | Matsushita Electric Ind Co Ltd | 熱伝導性基板の製造方法 |
JP2006013029A (ja) * | 2004-06-24 | 2006-01-12 | Toppan Printing Co Ltd | 半導体パッケージ |
JP2008140954A (ja) * | 2006-12-01 | 2008-06-19 | Matsushita Electric Ind Co Ltd | 放熱配線基板とその製造方法並びにこれを用いた発光モジュール |
-
2009
- 2009-03-30 JP JP2009083770A patent/JP5356883B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2010238829A (ja) | 2010-10-21 |
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