JP5243237B2 - 半導体装置およびその製造方法 - Google Patents
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- JP5243237B2 JP5243237B2 JP2008502576A JP2008502576A JP5243237B2 JP 5243237 B2 JP5243237 B2 JP 5243237B2 JP 2008502576 A JP2008502576 A JP 2008502576A JP 2008502576 A JP2008502576 A JP 2008502576A JP 5243237 B2 JP5243237 B2 JP 5243237B2
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- 239000004065 semiconductor Substances 0.000 title claims description 53
- 238000004519 manufacturing process Methods 0.000 title claims description 24
- 239000010410 layer Substances 0.000 claims description 223
- 229910021332 silicide Inorganic materials 0.000 claims description 50
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 49
- 239000000758 substrate Substances 0.000 claims description 31
- 239000011229 interlayer Substances 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 20
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 15
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 7
- 229910052698 phosphorus Inorganic materials 0.000 claims description 7
- 239000011574 phosphorus Substances 0.000 claims description 7
- 238000010438 heat treatment Methods 0.000 claims description 6
- 230000015654 memory Effects 0.000 description 27
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 229920005591 polysilicon Polymers 0.000 description 7
- 238000005498 polishing Methods 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 4
- 239000005360 phosphosilicate glass Substances 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 239000002002 slurry Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000005380 borophosphosilicate glass Substances 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000010941 cobalt Substances 0.000 description 3
- 229910017052 cobalt Inorganic materials 0.000 description 3
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 3
- 238000011109 contamination Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- -1 Silicon Oxide Nitride Chemical class 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000009751 slip forming Methods 0.000 description 2
- 229910019001 CoSi Inorganic materials 0.000 description 1
- 229910008484 TiSi Inorganic materials 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
Description
Claims (14)
- 半導体基板内に設けられたビットラインと、
該ビットラインに側面および底面を囲まれ、前記ビットライン内に設けられたシリサイド層と、
前記半導体基板上に設けられたONO膜と、
前記シリサイド層の両側の前記ビットライン上に前記ONO膜内のトラップ層の側面に接して設けられ、燐を含む酸化シリコン膜を有する側壁と、を具備する半導体装置。 - 前記側壁は、前記ONO膜内のトンネル酸化膜および前記トラップ層の側面に接して設けられ、
前記ONO膜内のトップ酸化膜は、前記トラップ層、前記側壁および前記シリサイド層上に設けられている請求項1記載の半導体装置。 - 前記ビットラインの幅方向に延在し、前記ONO膜上に設けられたワードラインを具備する請求項1または2記載の半導体装置。
- 前記ビットラインの幅方向に延在し、前記ONO膜上に設けられたワードラインと、
前記ONO膜と前記ワードラインとの間に設けられたゲート電極と、を具備し、
前記側壁は、前記ゲート電極および前記ONO膜の側面に接して設けられた請求項1記載の半導体装置。 - 前記ONO膜上に設けられた層間絶縁膜と、
前記層間絶縁膜内に設けられ、前記シリサイド層と接続するコンタクト部と、を具備する請求項1から4のいずれか一項記載の半導体装置。 - 半導体基板上にトラップ層を形成する工程と、
前記トラップ層に開口部を形成する工程と、
前記開口部の前記半導体基板内にビットラインを形成する工程と、
前記開口部の側面に燐を含む酸化シリコン膜を有する側壁を形成する工程と、
前記側壁をマスクに前記ビットライン内にシリサイド層を形成する工程と、を有する半導体装置の製造方法。 - 前記トラップ層、前記側壁および前記シリサイド層上にトップ酸化膜を形成する工程を有する請求項6記載の半導体装置の製造方法。
- 前記トップ酸化膜上に、前記ビットラインの幅方向に延在するワードラインを形成する工程を有する請求項7記載の半導体装置。
- 前記トラップ層上にトップ酸化膜を形成する工程と、
前記開口部を形成する工程は、前記トップ酸化膜および前記トラップ層に開口部を形成する工程を含み、
前記側壁を形成する工程は、前記トップ酸化膜および前記トラップ層の前記開口部の側面に前記側壁を形成する工程を含む請求項6記載の半導体装置の製造方法。 - 前記トップ酸化膜上にゲート電極となるべき第1導電層を形成する工程を具備し、
前記開口部を形成する工程は、前記第1導電層、前記トップ酸化膜および前記トラップ層に開口部を形成する工程を含み、
前記側壁を形成する工程は、前記第1導電層、前記トップ酸化膜および前記トラップ層の前記開口部の側面に側壁を形成する工程を含む請求項9記載の半導体装置の製造方法。 - 前記第1導電層上にワードラインとなるべき第2導電層を形成する工程と、
前記第2導電層および前記第1導電層の所定領域を除去し、第2導電層より前記ワードライン、前記第1導電層より前記ゲート電極を形成する工程と、を有する請求項10記載の半導体装置の製造方法。 - 前記第1導電層上に絶縁膜を形成する工程を有し、
前記シリサイド層を形成する工程は、前記絶縁膜および前記開口部内の前記ビットライン上に金属層を形成する工程と、熱処理することにより前記金属層をシリサイド化する工程とを含む請求項11記載の半導体装置の製造方法。 - 前記開口部内に絶縁層を形成する工程を具備し、
前記第2導電層を形成する工程は、前記第1導電層および前記絶縁層上に前記第2導電層を形成する工程を含む請求項11記載の半導体装置の製造方法。 - 前記トラップ層上に層間絶縁膜を形成する工程と、
前記層間絶縁膜内に、前記シリサイド層に接続するコンタクト部を形成する工程と、を有する請求項6から13のいずれか一項記載の半導体装置の製造方法。
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PCT/JP2006/303702 WO2007099589A1 (ja) | 2006-02-28 | 2006-02-28 | 半導体装置およびその製造方法 |
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JP5243237B2 true JP5243237B2 (ja) | 2013-07-24 |
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US (2) | US8143664B2 (ja) |
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JP5379366B2 (ja) * | 2007-09-20 | 2013-12-25 | スパンション エルエルシー | 半導体装置およびその製造方法 |
US8084759B2 (en) * | 2007-10-31 | 2011-12-27 | Qimonda Ag | Integrated circuit including doped semiconductor line having conductive cladding |
KR101718016B1 (ko) * | 2010-06-04 | 2017-03-21 | 엘지전자 주식회사 | 이동 단말기 및 이동단말기 안테나의 제조방법 |
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JPH10284627A (ja) * | 1997-02-07 | 1998-10-23 | Citizen Watch Co Ltd | 半導体不揮発性記憶装置の製造方法 |
JP2004095893A (ja) * | 2002-08-30 | 2004-03-25 | Nec Electronics Corp | 半導体記憶装置及びその制御方法と製造方法 |
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US6103572A (en) * | 1997-02-07 | 2000-08-15 | Citizen Watch Co., Ltd. | Method of fabricating a semiconductor nonvolatile storage device |
US7214579B2 (en) * | 2002-10-24 | 2007-05-08 | Nxp Bv. | Self-aligned 2-bit “double poly CMP” flash memory cell |
WO2007026391A1 (ja) * | 2005-08-30 | 2007-03-08 | Spansion Llc | 半導体装置およびその製造方法 |
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Patent Citations (2)
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JPH10284627A (ja) * | 1997-02-07 | 1998-10-23 | Citizen Watch Co Ltd | 半導体不揮発性記憶装置の製造方法 |
JP2004095893A (ja) * | 2002-08-30 | 2004-03-25 | Nec Electronics Corp | 半導体記憶装置及びその制御方法と製造方法 |
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Publication number | Publication date |
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WO2007099589A1 (ja) | 2007-09-07 |
US20120083109A1 (en) | 2012-04-05 |
US20070210373A1 (en) | 2007-09-13 |
US8143664B2 (en) | 2012-03-27 |
JPWO2007099589A1 (ja) | 2009-07-16 |
US8536638B2 (en) | 2013-09-17 |
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