JP5226047B2 - 半導体発光素子の実装方法 - Google Patents
半導体発光素子の実装方法 Download PDFInfo
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- JP5226047B2 JP5226047B2 JP2010189382A JP2010189382A JP5226047B2 JP 5226047 B2 JP5226047 B2 JP 5226047B2 JP 2010189382 A JP2010189382 A JP 2010189382A JP 2010189382 A JP2010189382 A JP 2010189382A JP 5226047 B2 JP5226047 B2 JP 5226047B2
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Description
また、バンプ形成工程では、第1バンプおよび上記第2バンプの各上面とレジストの上面との高低差が10μm以上の場合に、第1バンプの形成速度と第2バンプ形成速度との差が顕著になる。よって、上記の構成とすることで、さらに容易に第1バンプを第2バンプよりも高く形成することができる。
図1は、本実施形態に係る実装方法を示す図である。具体的には、図1(a)は、LEDチップ1にバンプ11・12を形成した状態を示す断面図であり、図1(b)は、当該状態におけるLEDチップ1の電極側からの平面図であり、図1(c)は、図1(a)に示すLEDチップ1をセラミック基板9に実装した状態を示す断面図である。
続いて、LEDチップ1の実装方法の具体的内容について、図2を参照して説明する。本実施形態では、LEDチップ1をフリップチップ実装するためのバンプ11・12を、電解メッキ法によるAuメッキで形成する。
上記の構成では、LEDチップ1の負電極5上および正電極6上に、それぞれ1つのバンプを形成していた。これに対し、以下では、正電極6上に複数のバンプを形成することにより、接合強度の向上および接触抵抗の低減を実現する構成について説明する。
なお、上述した実施形態では、LEDチップ1は、正電極6が負電極5よりも高い位置にある構造であったが、負電極5が正電極6よりも高い位置にある構造であってもよい。この場合、p型窒化物半導体層4の上面にn型窒化物半導体層3が積層され、p型窒化物半導体層4の上面に正電極6が形成され、n型窒化物半導体層3の上面に負電極5が形成される。
2 サファイア基板
3 n型窒化物半導体層(第1導電型半導体層)
4 p型窒化物半導体層(第2導電型半導体層)
4a 活性層
5 負電極(第1電極部)
6 正電極(第2電極部)
9 セラミック基板(基板)
10a バンプ
10b バンプ
11 バンプ(第1バンプ)
12 バンプ(第2バンプ)
15 給電メタル
16 レジスト
16a 開口部(第1開口部)
16b 開口部(第2開口部)
Claims (6)
- 第1導電型半導体層と、
第1導電型半導体層の上面の一部に積層された第2導電型半導体層と、
第1導電型半導体層の上面の他の一部に形成された第1電極部と、
第2導電型半導体層の上面に形成された第2電極部と、を備え、
上記第1導電型半導体層に対して、上記第2電極部の上面が上記第1電極部の上面より高い位置にある半導体発光素子を、バンプを介して基板に実装する半導体発光素子の実装方法であって、
上記第1電極部上および上記第2電極部上にレジストを積層して、当該レジストの上記第1電極部に対応する部分に第1開口部を形成し、当該レジストの上記第2電極部に対応する部分に第2開口部を形成する開口部形成工程と、
電解メッキ法によって、上記第1開口部内および上記第2開口部内にそれぞれ、第1バンプおよび第2バンプを形成するバンプ形成工程と、
上記レジストを除去するレジスト除去工程と、
上記第1バンプおよび上記第2バンプを上記基板にボンディングするボンディング工程と、を有し、
上記第1開口部の断面積は、上記第2開口部の断面積よりも大きく、
上記バンプ形成工程において、上記第1バンプおよび上記第2バンプの各上面の上記第1導電型半導体層に対する高さと、上記レジストの上面の上記第1導電型半導体層に対する高さとの差が、10μm以上であることを特徴とする半導体発光素子の実装方法。 - 上記第2開口部の個数が上記第1開口部の個数よりも多いことを特徴とする請求項1に記載の半導体発光素子の実装方法。
- 上記第2開口部の個数は、上記第1開口部の断面積の総和と上記第2開口部の断面積の総和との差が最小となる個数であることを特徴とする請求項2に記載の半導体発光素子の実装方法。
- 上記第1バンプの上面と上記第2バンプの上面とは、上記第1導電型半導体層に対する高さが略同一であることを特徴とする請求項1、2または3に記載の半導体発光素子の実装方法。
- 上記第1開口部の断面積は、上記第2開口部の断面積の10倍以下であることを特徴とする請求項1〜4のいずれか1項に記載の半導体発光素子の実装方法。
- 上記第1導電型半導体層に対する、上記第1電極部の上面と上記第2電極部の上面との高低差が、2μm以下であることを特徴とする請求項1〜5のいずれか1項に記載の半導体発光素子の実装方法。
Priority Applications (6)
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JP2010189382A JP5226047B2 (ja) | 2010-08-26 | 2010-08-26 | 半導体発光素子の実装方法 |
KR1020127031364A KR20130023261A (ko) | 2010-08-26 | 2011-06-08 | 반도체 발광 소자의 실장 방법 |
CN201180026204.7A CN102918664B (zh) | 2010-08-26 | 2011-06-08 | 半导体发光元件的组装方法 |
PCT/JP2011/063168 WO2012026182A1 (ja) | 2010-08-26 | 2011-06-08 | 半導体発光素子の実装方法 |
US13/697,766 US9048407B2 (en) | 2010-08-26 | 2011-06-08 | Mounting method for semiconductor light emitter using resist with openings of different sizes |
TW100122079A TWI429114B (zh) | 2010-08-26 | 2011-06-23 | 半導體發光元件之安裝方法 |
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JP2010189382A JP5226047B2 (ja) | 2010-08-26 | 2010-08-26 | 半導体発光素子の実装方法 |
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JP2012049296A JP2012049296A (ja) | 2012-03-08 |
JP5226047B2 true JP5226047B2 (ja) | 2013-07-03 |
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US (1) | US9048407B2 (ja) |
JP (1) | JP5226047B2 (ja) |
KR (1) | KR20130023261A (ja) |
CN (1) | CN102918664B (ja) |
TW (1) | TWI429114B (ja) |
WO (1) | WO2012026182A1 (ja) |
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KR101805074B1 (ko) * | 2016-12-20 | 2017-12-06 | 에스케이씨 주식회사 | 세라믹 다층회로 기판의 제조방법 |
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JP5782823B2 (ja) | 2011-04-27 | 2015-09-24 | 日亜化学工業株式会社 | 窒化物半導体発光素子およびその製造方法 |
JP6143104B2 (ja) | 2012-12-05 | 2017-06-07 | 株式会社村田製作所 | バンプ付き電子部品及びバンプ付き電子部品の製造方法 |
JP6229406B2 (ja) * | 2013-09-27 | 2017-11-15 | 日亜化学工業株式会社 | 半導体発光素子及びその製造方法 |
JP6401285B2 (ja) * | 2014-09-26 | 2018-10-10 | 東芝ホクト電子株式会社 | 発光モジュールの製造方法 |
US11024608B2 (en) | 2017-03-28 | 2021-06-01 | X Display Company Technology Limited | Structures and methods for electrical connection of micro-devices and substrates |
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US11101417B2 (en) * | 2019-08-06 | 2021-08-24 | X Display Company Technology Limited | Structures and methods for electrically connecting printed components |
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JP4688594B2 (ja) | 2004-08-06 | 2011-05-25 | パナソニック株式会社 | 発光光源、照明装置及び表示装置 |
US7566650B2 (en) * | 2005-09-23 | 2009-07-28 | Stats Chippac Ltd. | Integrated circuit solder bumping system |
KR20090032207A (ko) * | 2007-09-27 | 2009-04-01 | 삼성전기주식회사 | 질화갈륨계 발광다이오드 소자 |
CN101855734B (zh) * | 2007-11-15 | 2011-11-02 | 松下电器产业株式会社 | 半导体发光装置 |
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2010
- 2010-08-26 JP JP2010189382A patent/JP5226047B2/ja active Active
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2011
- 2011-06-08 KR KR1020127031364A patent/KR20130023261A/ko not_active Application Discontinuation
- 2011-06-08 WO PCT/JP2011/063168 patent/WO2012026182A1/ja active Application Filing
- 2011-06-08 CN CN201180026204.7A patent/CN102918664B/zh active Active
- 2011-06-08 US US13/697,766 patent/US9048407B2/en active Active
- 2011-06-23 TW TW100122079A patent/TWI429114B/zh active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101805074B1 (ko) * | 2016-12-20 | 2017-12-06 | 에스케이씨 주식회사 | 세라믹 다층회로 기판의 제조방법 |
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JP2012049296A (ja) | 2012-03-08 |
US20130065331A1 (en) | 2013-03-14 |
TWI429114B (zh) | 2014-03-01 |
CN102918664A (zh) | 2013-02-06 |
KR20130023261A (ko) | 2013-03-07 |
CN102918664B (zh) | 2015-04-15 |
WO2012026182A1 (ja) | 2012-03-01 |
US9048407B2 (en) | 2015-06-02 |
TW201216533A (en) | 2012-04-16 |
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