JP5166017B2 - セラミックス配線基板の製造方法、およびそれを用いた半導体装置の製造方法 - Google Patents

セラミックス配線基板の製造方法、およびそれを用いた半導体装置の製造方法 Download PDF

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Publication number
JP5166017B2
JP5166017B2 JP2007501552A JP2007501552A JP5166017B2 JP 5166017 B2 JP5166017 B2 JP 5166017B2 JP 2007501552 A JP2007501552 A JP 2007501552A JP 2007501552 A JP2007501552 A JP 2007501552A JP 5166017 B2 JP5166017 B2 JP 5166017B2
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JP
Japan
Prior art keywords
layer
solder
alloy
solder layer
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2007501552A
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English (en)
Japanese (ja)
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JPWO2006082770A1 (ja
Inventor
美保 中村
悦幸 福田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Materials Co Ltd
Original Assignee
Toshiba Corp
Toshiba Materials Co Ltd
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Publication date
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Priority to JP2007501552A priority Critical patent/JP5166017B2/ja
Publication of JPWO2006082770A1 publication Critical patent/JPWO2006082770A1/ja
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73257—Bump and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP2007501552A 2005-02-07 2006-01-30 セラミックス配線基板の製造方法、およびそれを用いた半導体装置の製造方法 Active JP5166017B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007501552A JP5166017B2 (ja) 2005-02-07 2006-01-30 セラミックス配線基板の製造方法、およびそれを用いた半導体装置の製造方法

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2005030092 2005-02-07
JP2005030092 2005-02-07
PCT/JP2006/301415 WO2006082770A1 (ja) 2005-02-07 2006-01-30 セラミックス配線基板とその製造方法、およびそれを用いた半導体装置
JP2007501552A JP5166017B2 (ja) 2005-02-07 2006-01-30 セラミックス配線基板の製造方法、およびそれを用いた半導体装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012193144A Division JP5417505B2 (ja) 2005-02-07 2012-09-03 半導体装置

Publications (2)

Publication Number Publication Date
JPWO2006082770A1 JPWO2006082770A1 (ja) 2008-06-26
JP5166017B2 true JP5166017B2 (ja) 2013-03-21

Family

ID=36777154

Family Applications (2)

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JP2007501552A Active JP5166017B2 (ja) 2005-02-07 2006-01-30 セラミックス配線基板の製造方法、およびそれを用いた半導体装置の製造方法
JP2012193144A Active JP5417505B2 (ja) 2005-02-07 2012-09-03 半導体装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2012193144A Active JP5417505B2 (ja) 2005-02-07 2012-09-03 半導体装置

Country Status (4)

Country Link
US (1) US7795732B2 (enExample)
JP (2) JP5166017B2 (enExample)
TW (1) TW200637441A (enExample)
WO (1) WO2006082770A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008026839A1 (de) * 2007-12-20 2009-07-02 Osram Opto Semiconductors Gmbh Verfahren zum Herstellen eines optoelektronischen Bauelements in Dünnschichttechnik
TWI436382B (zh) * 2009-04-02 2014-05-01 Nat Univ Tsing Hua 應用磁力控制可活動式電感器的方法及其裝置
CN103140026B (zh) * 2013-02-04 2015-12-02 深圳市佳捷特陶瓷电路技术有限公司 陶瓷覆铜板及其制备方法
US9676047B2 (en) 2013-03-15 2017-06-13 Samsung Electronics Co., Ltd. Method of forming metal bonding layer and method of manufacturing semiconductor light emitting device using the same
DE102015108668B4 (de) * 2015-06-02 2018-07-26 Rogers Germany Gmbh Verfahren zur Herstellung eines Verbundmaterials
TWI638433B (zh) * 2017-10-24 2018-10-11 英屬維京群島商艾格生科技股份有限公司 元件次黏著載具及其製造方法
JP7181843B2 (ja) * 2019-07-30 2022-12-01 日本特殊陶業株式会社 配線基板、および配線基板の製造方法
CN113905531B (zh) * 2021-12-10 2022-03-01 四川英创力电子科技股份有限公司 一种印制电路板线路制作方法
JP7689089B2 (ja) * 2022-01-25 2025-06-05 シチズンファインデバイス株式会社 基板の製造方法
WO2024219268A1 (ja) * 2023-04-18 2024-10-24 京セラ株式会社 基板
TWI876868B (zh) * 2024-02-06 2025-03-11 同欣電子工業股份有限公司 金屬陶瓷基板及其製造方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05190973A (ja) * 1992-01-14 1993-07-30 Toshiba Corp 半導体レーザ用サブマウント
JPH11284281A (ja) * 1998-03-30 1999-10-15 Sharp Corp 半導体レーザ装置の製造方法
JP2000288770A (ja) * 1999-03-31 2000-10-17 Kyocera Corp ＡｕＳｎ多層ハンダ
JP2002252316A (ja) * 2001-02-26 2002-09-06 Kyocera Corp 配線基板
JP2002359427A (ja) * 2002-02-18 2002-12-13 Sumitomo Electric Ind Ltd サブマウントおよび半導体装置
JP2002368020A (ja) * 2002-04-30 2002-12-20 Sumitomo Electric Ind Ltd サブマウントおよび半導体装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2901091B2 (ja) * 1990-09-27 1999-06-02 株式会社日立製作所 半導体装置
US5367195A (en) * 1993-01-08 1994-11-22 International Business Machines Corporation Structure and method for a superbarrier to prevent diffusion between a noble and a non-noble metal
JP3377553B2 (ja) 1993-05-13 2003-02-17 三菱電機株式会社 半導体レーザ装置
US6590913B1 (en) * 1999-05-14 2003-07-08 Triquint Technology Holding Co. Barrier layer and method of making the same
JP3910363B2 (ja) * 2000-12-28 2007-04-25 富士通株式会社 外部接続端子
JP3912130B2 (ja) * 2002-02-18 2007-05-09 住友電気工業株式会社 サブマウント
JP3982284B2 (ja) * 2002-03-06 2007-09-26 住友電気工業株式会社 サブマウントおよび半導体装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05190973A (ja) * 1992-01-14 1993-07-30 Toshiba Corp 半導体レーザ用サブマウント
JPH11284281A (ja) * 1998-03-30 1999-10-15 Sharp Corp 半導体レーザ装置の製造方法
JP2000288770A (ja) * 1999-03-31 2000-10-17 Kyocera Corp ＡｕＳｎ多層ハンダ
JP2002252316A (ja) * 2001-02-26 2002-09-06 Kyocera Corp 配線基板
JP2002359427A (ja) * 2002-02-18 2002-12-13 Sumitomo Electric Ind Ltd サブマウントおよび半導体装置
JP2002368020A (ja) * 2002-04-30 2002-12-20 Sumitomo Electric Ind Ltd サブマウントおよび半導体装置

Also Published As

Publication number Publication date
TW200637441A (en) 2006-10-16
JP2013016838A (ja) 2013-01-24
JPWO2006082770A1 (ja) 2008-06-26
TWI312647B (enExample) 2009-07-21
JP5417505B2 (ja) 2014-02-19
WO2006082770A1 (ja) 2006-08-10
US7795732B2 (en) 2010-09-14
US20090050920A1 (en) 2009-02-26

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