JP2006086208A - 半導体素子とその製造方法、及び電子部品ユニット - Google Patents
半導体素子とその製造方法、及び電子部品ユニット Download PDFInfo
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Abstract
【解決手段】 基板と、基板上方に形成された複合接合層と、複合接合層上方に形成された第1の電極と、第1の電極上を含む領域に形成された半導体層と、半導体層上の一部の領域に形成された第2の電極とを有し、複合接合層は、基板、及び第1の接合層を含む支持基板と、半導体層、第1の電極、及び第2の接合層を含む半導体積層構造とを接合するときに形成され、第1または第2の接合層は共晶成分を含み、支持基板及び半導体積層構造の少なくとも一方は、拡散材料を含む拡散材料層を含み、複合接合層は、第1または第2の接合層の一方に含まれる共晶成分が他方の接合層と混合して第1の混合体を形成し、更に第1の混合体と拡散材料層に含まれる拡散材料とが混合し、第1の混合体の溶融温度より高い溶融温度を有する第2の混合体を形成することにより形成される半導体素子を提供する。
【選択図】 図8
Description
図19は、上記構造を有する、従来の半導体発光素子61の一例を示す概略的な断面図である。たとえばn型不純物を高濃度に添加したSi基板である導電性支持基板63上に、金属からなる反射層68が積層される。反射層68上には、正孔に対してポテンシャルバリア機能を有するn型クラッド層66、正孔と電子との結合により光を発生する活性層65、及び、電子に対してポテンシャルバリア機能を有するp型クラッド層64を、この順に下からエピタキシャル成長する。p型クラッド層64上には、p側オーミック電極62が形成される。また、導電性支持基板63の反射層68が形成されている面とは反対の面に、n側取出電極67が形成される。
12 Au層
13 Ti層
14 Ni層
15 AuSn層
21 半導体基板
22 半導体発光層
22b バリア層
22w ウエル層
22p p型半導体層
22n n型半導体層
22i i層
23 反射電極層
23a 反射層
23b 電極層
24 TaN層
25、25a、25b、25c、25d、25e、25f Al層
26、26a、26b、26c Ta層
27 Au層
28 表電極
29 接合層
30 支持基板
31 半導体積層構造
33 複合接合層
34 複合バリア層
61 半導体発光素子
62 p側オーミック電極
63 導電性支持基板
64 p型クラッド層
65 活性層
66 n型クラッド層
67 n側取出電極
68 反射層
69 仮基板
70 第1の基板
71 第2の基板
80 基台領域
81 マウント面
82 基台表面積層部分
83 半導体素子チップ
84 電子部品領域
85 パッケージユニット
S、T 領域
Claims (17)
- (a)第1の基板を準備する工程と、
(b)前記第1の基板上方に第1の接合層を形成して、支持基板を得る工程と、
(c)第2の基板を準備する工程と、
(d)前記第2の基板上に、半導体層を形成する工程と、
(e)前記半導体層上方に、第2の接合層を形成して、半導体積層構造を得る工程と、
(f)拡散材料を含む拡散材料層を形成する工程であって、(f1)前記工程(b)において、前記第1の基板上方に拡散材料層を形成し、前記拡散材料層上方に前記第1の接合層を形成する工程、(f2)前記工程(e)において、前記半導体層上方に拡散材料層を形成し、前記拡散材料層上方に前記第2の接合層を形成する工程、のうち少なくとも一方の工程により拡散材料層を形成する工程と、
(g)前記支持基板の前記第1の接合層と、前記半導体積層構造の前記第2の接合層とを接合し、接合体を得る工程であって、(g1)前記第1または第2の接合層は共晶材料を含んで形成されており、前記第1の接合層と前記第2の接合層とを混合させて第1の混合体を形成する工程と、(g2)前記第1の混合体と前記拡散材料層の拡散材料とを混合させて、前記第1の混合体の溶融温度より高い溶融温度を有する第2の混合体を形成する工程と、を含んで接合体を得る工程と
を有する半導体素子の製造方法。 - 前記工程(f)において、形成された前記拡散材料層の少なくとも一つの上に拡散制御層を形成し、前記拡散制御層上に前記第1または第2の接合層を形成し、
前記拡散制御層は、前記工程(g)において損われる請求項1に記載の半導体素子の製造方法。 - 前記工程(b)において、前記第1の基板上方に、密着性向上層、濡れ層のうち少なくとも一方を形成し、その上方に前記第1の接合層を形成し、
前記工程(f1)において、前記密着性向上層または濡れ層の上方に前記拡散材料層を形成する請求項1または2に記載の半導体素子の製造方法。 - 前記工程(e)において、前記半導体層上方に、密着性向上層、濡れ層のうち少なくとも一方を形成し、その上方に前記第2の接合層を形成し、
前記工程(f2)において、前記密着性向上層または濡れ層の上方に前記拡散材料層を形成する請求項1〜3のいずれか1項に記載の半導体素子の製造方法。 - 前記工程(d)において、更に、前記半導体層上の少なくとも一部の領域に第1の電極を形成し、前記第1の電極上方にバリア層を形成し、
前記工程(e)において、前記バリア層上方に前記第2の接合層を形成し、
前記工程(f2)において、前記拡散材料層を前記バリア層と前記第2の接合層との間に形成し、
前記バリア層は、前記工程(g)において前記第1または第2の接合層に含まれる共晶材料が、前記第1の電極側に侵入することを防止する請求項1〜4のいずれか1項に記載の半導体素子の製造方法。 - 前記第1または第2の接合層をAuを主体とする共晶材料で形成する請求項1〜5のいずれか1項に記載の半導体素子の製造方法。
- 前記工程(f)において、前記拡散材料層をAl、AgもしくはCu、または、Al、AgもしくはCuを主体とする合金で形成する請求項1〜6のいずれか1項に記載の半導体素子の製造方法。
- 基板と、
前記基板上方に形成された複合接合層と、
前記複合接合層上方に形成された第1の電極と、
前記第1の電極上を含む領域に形成された半導体層と、
前記半導体層上の一部の領域に形成された第2の電極と
を有し、
前記複合接合層は、前記基板、及び第1の接合層を含む支持基板と、前記半導体層、前記第1の電極、及び第2の接合層を含む半導体積層構造とを接合するときに形成され、
前記第1または第2の接合層は共晶成分を含み、
前記支持基板及び前記半導体積層構造の少なくとも一方は、拡散材料を含む拡散材料層を含み、
前記複合接合層は、前記第1または第2の接合層の一方に含まれる共晶成分が他方の接合層と混合して第1の混合体を形成し、更に前記第1の混合体と前記拡散材料層に含まれる拡散材料とが混合し、前記第1の混合体の溶融温度より高い溶融温度を有する第2の混合体を形成することにより形成される半導体素子。 - 前記基板と前記複合接合層との間に、密着性向上層、濡れ層のうち少なくとも一方を含む請求項8に記載の半導体素子。
- 前記複合接合層と前記第1の電極との間に、密着性向上層、濡れ層のうち少なくとも一方を含む請求項8または9に記載の半導体素子。
- 前記複合接合層と前記第1の電極との間にバリア層を含む請求項8〜10のいずれか1項に記載の半導体素子。
- 前記複合接合層が、前記支持基板と前記半導体積層構造との接合の際、前記第1の混合体と前記拡散材料層に含まれる拡散材料との混合を制御する拡散制御層を含む請求項8〜11のいずれか1項に記載の半導体素子。
- 前記拡散材料層が、Al、AgもしくはCu、または、Al、AgもしくはCuを主体とする合金で形成される請求項8〜12のいずれか1項に記載の半導体素子。
- 基台と、
前記基台上方に形成された複合接合層と、
前記複合接合層上方に形成された電子部品と
を有し、
前記複合接合層は、前記基台、及び第1の接合層を含む基台領域と、前記電子部品及び第2の接合層を含む電子部品領域とを接合するときに形成され、
前記第1または第2の接合層は共晶成分を含み、
前記基台領域及び前記電子部品領域の少なくとも一方は、拡散材料を含む拡散材料層を含み、
前記複合接合層は、前記第1または第2の接合層の一方に含まれる共晶成分が他方の接合層と混合して第1の混合体を形成し、更に前記第1の混合体と前記拡散材料層に含まれる拡散材料とが混合し、前記第1の混合体の溶融温度より高い溶融温度を有する第2の混合体を形成することにより形成される電子部品ユニット。 - 前記基台と前記複合接合層との間に、密着性向上層、濡れ層のうち少なくとも一方を含む請求項14に記載の電子部品ユニット。
- 前記複合接合層と前記電子部品との間に、密着性向上層、濡れ層のうち少なくとも一方を含む請求項14または15に記載の電子部品ユニット。
- 前記複合接合層が、前記基台領域と前記電子部品領域との接合の際、前記第1の混合体と前記拡散材料層に含まれる拡散材料との混合を制御する拡散制御層を含む請求項14〜16のいずれか1項に記載の電子部品ユニット。
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Cited By (7)
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JP2008098336A (ja) * | 2006-10-11 | 2008-04-24 | Stanley Electric Co Ltd | 半導体発光素子およびその製造方法 |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0669608A (ja) * | 1991-11-15 | 1994-03-11 | American Teleph & Telegr Co <Att> | ボンディング方法 |
JPH0794786A (ja) * | 1993-04-27 | 1995-04-07 | Nec Corp | 光半導体素子接合構造と接合方法 |
JP2004221525A (ja) * | 2002-12-25 | 2004-08-05 | Denso Corp | Icパッケージ及びその製造方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05251739A (ja) | 1992-03-06 | 1993-09-28 | Toshiba Corp | 半導体発光デバイス |
US5917202A (en) * | 1995-12-21 | 1999-06-29 | Hewlett-Packard Company | Highly reflective contacts for light emitting semiconductor devices |
US20010042866A1 (en) * | 1999-02-05 | 2001-11-22 | Carrie Carter Coman | Inxalygazn optical emitters fabricated via substrate removal |
JP2001044491A (ja) | 1999-07-13 | 2001-02-16 | Korai Kagi Kofun Yugenkoshi | Led及びその製造方法 |
JP3460019B2 (ja) | 1999-12-27 | 2003-10-27 | 全新光電科技股▲ふん▼有限公司 | 金属コーティング反射永久基板を有する発光ダイオードおよび金属コーティング反射永久基板を有する発光ダイオードの製造方法 |
JP2002217450A (ja) | 2001-01-22 | 2002-08-02 | Sanken Electric Co Ltd | 半導体発光素子及びその製造方法 |
TW577178B (en) * | 2002-03-04 | 2004-02-21 | United Epitaxy Co Ltd | High efficient reflective metal layer of light emitting diode |
-
2004
- 2004-09-14 JP JP2004267159A patent/JP4814503B2/ja not_active Expired - Fee Related
-
2005
- 2005-08-16 US US11/204,527 patent/US7429754B2/en not_active Expired - Fee Related
- 2005-08-26 DE DE102005040527A patent/DE102005040527A1/de not_active Ceased
- 2005-09-05 CN CNB2005100986295A patent/CN100511735C/zh not_active Expired - Fee Related
-
2008
- 2008-06-25 US US12/146,236 patent/US7666692B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0669608A (ja) * | 1991-11-15 | 1994-03-11 | American Teleph & Telegr Co <Att> | ボンディング方法 |
JPH0794786A (ja) * | 1993-04-27 | 1995-04-07 | Nec Corp | 光半導体素子接合構造と接合方法 |
JP2004221525A (ja) * | 2002-12-25 | 2004-08-05 | Denso Corp | Icパッケージ及びその製造方法 |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2008098336A (ja) * | 2006-10-11 | 2008-04-24 | Stanley Electric Co Ltd | 半導体発光素子およびその製造方法 |
US8158459B2 (en) | 2007-06-20 | 2012-04-17 | Stanley Electric Co., Ltd. | Substrate bonding method and semiconductor device |
US8288868B2 (en) | 2007-06-20 | 2012-10-16 | Stanley Electric Co., Ltd. | Substrate bonding method and semiconductor device |
US9252331B2 (en) | 2007-09-28 | 2016-02-02 | Osram Opto Semiconductors Gmbh | Thin-film LED having a mirror layer and method for the production thereof |
US8232120B2 (en) | 2008-08-22 | 2012-07-31 | Stanley Electric Co., Ltd. | Manufacturing method of semiconductor light-emitting apparatus and semiconductor light-emitting apparatus |
DE102009037319A1 (de) | 2008-08-22 | 2010-03-11 | Stanley Electric Co. Ltd. | Verfahren zur Herstellung einer Licht emittierenden Halbleitervorrichtung und Licht emittierende Halbleitervorrichtung |
JP2010050318A (ja) * | 2008-08-22 | 2010-03-04 | Stanley Electric Co Ltd | 半導体発光装置の製造方法及び半導体発光装置 |
TWI475720B (zh) * | 2008-08-22 | 2015-03-01 | Stanley Electric Co Ltd | 半導體發光裝置的製造方法及半導體發光裝置 |
KR101581957B1 (ko) * | 2008-08-22 | 2015-12-31 | 스탄레 덴끼 가부시키가이샤 | 반도체 발광 장치의 제조 방법 및 반도체 발광 장치 |
KR20100023772A (ko) * | 2008-08-22 | 2010-03-04 | 스탄레 덴끼 가부시키가이샤 | 반도체 발광 장치의 제조 방법 및 반도체 발광 장치 |
US8530917B2 (en) | 2009-03-04 | 2013-09-10 | Stanley Electric Co., Ltd. | Optical semiconductor device having air gap forming reflective mirror and its manufacturing method |
JP2019176016A (ja) * | 2018-03-28 | 2019-10-10 | 日亜化学工業株式会社 | 窒化物半導体発光素子 |
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US20080268616A1 (en) | 2008-10-30 |
JP4814503B2 (ja) | 2011-11-16 |
CN1750284A (zh) | 2006-03-22 |
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US20060057817A1 (en) | 2006-03-16 |
US7666692B2 (en) | 2010-02-23 |
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