JP5150195B2 - 縦型半導体装置 - Google Patents
縦型半導体装置 Download PDFInfo
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- JP5150195B2 JP5150195B2 JP2007268776A JP2007268776A JP5150195B2 JP 5150195 B2 JP5150195 B2 JP 5150195B2 JP 2007268776 A JP2007268776 A JP 2007268776A JP 2007268776 A JP2007268776 A JP 2007268776A JP 5150195 B2 JP5150195 B2 JP 5150195B2
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- igbt
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- 239000004065 semiconductor Substances 0.000 title claims description 12
- 230000005684 electric field Effects 0.000 claims description 68
- 230000002093 peripheral effect Effects 0.000 claims description 17
- 239000000969 carrier Substances 0.000 description 9
- 230000015556 catabolic process Effects 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 239000012535 impurity Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 230000002195 synergetic effect Effects 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
Description
図1は、第1の実施形態における縦型絶縁ゲートバイポーラトランジスタ(IGBT:Insulated Gate Bipolar Transistor)の構成を示す断面図である。
図2は、第2の実施形態における縦型絶縁ゲートバイポーラトランジスタ(IGBT:Insulated Gate Bipolar Transistor)の構成を示す断面図であり、図3は、前記IGBTの上平面である。
図4は、第3の実施形態における縦型絶縁ゲートバイポーラトランジスタ(IGBT:Insulated Gate Bipolar Transistor)の構成を示す断面図である。
11,41 n型ベース層
12,42 p型ベース層
13,43 n型エミッタ層
14,44 ゲート絶縁膜
15,45 ゲート電極
16,46 エミッタ電極
17,47 n型バッファ層
18,48 p型コレクタ層
19,49 コレクタ電極
20,50 実効部
30,60 電界緩和部
25,55 ガードリング
27,57 n+ストッパー層
Claims (1)
- 第1導電型ベース層と、
前記第1導電型ベース層の、一方の主面の表面部分において選択的に形成された第2導電型ベース層と、
前記第2導電型ベース層の、前記第1導電型ベース層と相対向する側の表面部分において選択的に形成された第1導電型エミッタ層と、
前記第1導電型ベース層の、前記一方の主面の前記表面部分において、前記第2導電型ベース層の外周部に選択的に形成された電界緩和構造と、
少なくとも前記第2導電型ベース層とゲート絶縁膜を介して隣接するようにして形成されたゲート電極と、
前記第2導電型ベース層及び前記第1導電型エミッタ層と電気的に接続されるようにして形成されたエミッタ電極と、
第1導電型ベース層の他方の主面上に形成された第1導電型バッファ層と、
前記第1導電型バッファ層の、前記第1導電型ベース層と相対向する側の表面部分において、前記電界緩和構造の直下に位置する領域を除いて選択的に形成された第2導電型コレクタ層と、
前記第1導電型バッファ層の、前記第1導電型ベース層と相対向する主面上において、前記第2導電型コレクタ層と電気的に接続されるようにして形成されたコレクタ電極層とを具え、
前記第2導電型コレクタ層の、前記電界緩和構造の側に位置する端部が、前記第2導電型ベース層の、前記電界緩和構造の側に位置する端部から、前記第1導電型ベース層の厚さに相当する距離以上内方に位置することを特徴とする、縦型半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007268776A JP5150195B2 (ja) | 2007-10-16 | 2007-10-16 | 縦型半導体装置 |
US12/209,690 US7868397B2 (en) | 2007-10-16 | 2008-09-12 | Vertical semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007268776A JP5150195B2 (ja) | 2007-10-16 | 2007-10-16 | 縦型半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009099713A JP2009099713A (ja) | 2009-05-07 |
JP5150195B2 true JP5150195B2 (ja) | 2013-02-20 |
Family
ID=40533311
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007268776A Expired - Fee Related JP5150195B2 (ja) | 2007-10-16 | 2007-10-16 | 縦型半導体装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7868397B2 (ja) |
JP (1) | JP5150195B2 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009176772A (ja) * | 2008-01-21 | 2009-08-06 | Denso Corp | 半導体装置 |
JP5621703B2 (ja) | 2011-04-26 | 2014-11-12 | 三菱電機株式会社 | 半導体装置 |
JP5807724B2 (ja) * | 2012-09-13 | 2015-11-10 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP6633867B2 (ja) * | 2015-08-21 | 2020-01-22 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP6565815B2 (ja) | 2016-07-21 | 2019-08-28 | 株式会社デンソー | 半導体装置 |
JP6565814B2 (ja) | 2016-07-21 | 2019-08-28 | 株式会社デンソー | 半導体装置 |
JP6624101B2 (ja) | 2017-02-03 | 2019-12-25 | 株式会社デンソー | 半導体装置 |
JP2019012725A (ja) | 2017-06-29 | 2019-01-24 | 株式会社東芝 | 半導体装置 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3872827B2 (ja) | 1995-04-11 | 2007-01-24 | 株式会社東芝 | 高耐圧半導体素子 |
JP4054155B2 (ja) * | 2000-02-01 | 2008-02-27 | 三菱電機株式会社 | 半導体装置 |
JP4403366B2 (ja) * | 2003-06-04 | 2010-01-27 | 富士電機デバイステクノロジー株式会社 | 半導体装置およびその製造方法 |
JP4843253B2 (ja) * | 2005-05-23 | 2011-12-21 | 株式会社東芝 | 電力用半導体装置 |
-
2007
- 2007-10-16 JP JP2007268776A patent/JP5150195B2/ja not_active Expired - Fee Related
-
2008
- 2008-09-12 US US12/209,690 patent/US7868397B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2009099713A (ja) | 2009-05-07 |
US20090095977A1 (en) | 2009-04-16 |
US7868397B2 (en) | 2011-01-11 |
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