JP5147249B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP5147249B2 JP5147249B2 JP2007021409A JP2007021409A JP5147249B2 JP 5147249 B2 JP5147249 B2 JP 5147249B2 JP 2007021409 A JP2007021409 A JP 2007021409A JP 2007021409 A JP2007021409 A JP 2007021409A JP 5147249 B2 JP5147249 B2 JP 5147249B2
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- Prior art keywords
- film
- memory cell
- etching stopper
- semiconductor device
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 title claims description 27
- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 239000010410 layer Substances 0.000 claims description 54
- 238000005530 etching Methods 0.000 claims description 28
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 14
- 239000011229 interlayer Substances 0.000 claims description 14
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 10
- 229920001721 polyimide Polymers 0.000 claims description 10
- 230000001681 protective effect Effects 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 description 21
- 239000002184 metal Substances 0.000 description 21
- 238000009792 diffusion process Methods 0.000 description 15
- 239000000758 substrate Substances 0.000 description 8
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 3
- 239000000872 buffer Substances 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000006172 buffering agent Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000002784 hot electron Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42324—Gate electrodes for transistors with a floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
10 ゲート絶縁膜 11 フローティングゲート
12 ドレイン拡散層 13 ソースライン拡散層
14 ビットライン 15 LOCOS膜
16 コントロールゲートライン拡散層
17,18 ビアホール 19 コントロールゲートラインメタル層
20 パッド電極 21 酸化膜
22 開口部 23 シリコン窒化膜
24 ポリイミド膜 25 レジスト膜
CM キャップメタル層 MC メモリセル
Claims (3)
- 紫外線消去型のメモリセルと、このメモリセルに接続された配線層とを含むメモリ領域と、
前記メモリセル及び前記配線層を覆う層間絶縁膜と、
前記層間絶縁膜を介して前記配線層より上層に、前記メモリ領域から離れて形成された外部接続電極と、を備えた半導体装置の製造方法において、
前記外部接続電極及び前記層間絶縁膜上に紫外線を透過するエッチングストッパー膜を形成する工程と、
前記外部接続電極上の前記エッチングストッパー膜を選択的にエッチング除去し、前記メモリセル上には前記エッチングストッパー膜を残す工程と、
前記エッチングストッパー膜上及び前記エッチングストッパー膜が除去された前記外部接続電極上に紫外線を透過しない保護膜を形成する工程と、
前記メモリセル上に残された前記エッチングストッパー膜を用いて前記外部接続電極上及びメモリ領域上の保護膜を選択的にエッチング除去する工程と、を備えることを特徴とする半導体装置の製造方法。 - 前記エッチングストッパー膜はシリコン酸化膜であり、前記保護膜は、窒化シリコン膜を含むことを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記保護膜はポリイミド膜を含むことを特徴とする請求項2に記載の半導体装置の製造方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007021409A JP5147249B2 (ja) | 2007-01-31 | 2007-01-31 | 半導体装置の製造方法 |
CN2008100026383A CN101236930B (zh) | 2007-01-31 | 2008-01-14 | 半导体装置的制造方法 |
US12/020,761 US7655569B2 (en) | 2007-01-31 | 2008-01-28 | Method of manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007021409A JP5147249B2 (ja) | 2007-01-31 | 2007-01-31 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008187129A JP2008187129A (ja) | 2008-08-14 |
JP5147249B2 true JP5147249B2 (ja) | 2013-02-20 |
Family
ID=39729942
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007021409A Active JP5147249B2 (ja) | 2007-01-31 | 2007-01-31 | 半導体装置の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7655569B2 (ja) |
JP (1) | JP5147249B2 (ja) |
CN (1) | CN101236930B (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10636800B2 (en) | 2015-01-29 | 2020-04-28 | Hewlett-Packard Development Company, L.P. | Dischargeable electrical programmable read only memory (EPROM) cell |
CN106129059A (zh) * | 2016-07-27 | 2016-11-16 | 深圳市航顺芯片技术研发有限公司 | 一种基于cmos深亚微米工艺的eeprom结构 |
CN106601747A (zh) * | 2016-12-30 | 2017-04-26 | 合肥恒烁半导体有限公司 | 单元阵体区域易于紫外线透光的版图布线方法 |
CN112447739B (zh) * | 2019-09-02 | 2023-09-19 | 联芯集成电路制造(厦门)有限公司 | 半导体存储装置 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0783075B2 (ja) * | 1986-03-14 | 1995-09-06 | 三菱電機株式会社 | 半導体装置の製造方法 |
JPH02172282A (ja) * | 1988-12-24 | 1990-07-03 | Mitsubishi Electric Corp | 半導体装置 |
JPH02309682A (ja) * | 1989-05-24 | 1990-12-25 | Hitachi Ltd | 半導体集積回路装置 |
US6507061B1 (en) * | 2001-08-31 | 2003-01-14 | Intel Corporation | Multiple layer phase-change memory |
JP2003142485A (ja) * | 2001-11-01 | 2003-05-16 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
US6924241B2 (en) * | 2003-02-24 | 2005-08-02 | Promos Technologies, Inc. | Method of making a silicon nitride film that is transmissive to ultraviolet light |
AU2003220989A1 (en) * | 2003-03-28 | 2004-10-25 | Fujitsu Limited | Semiconductor device |
KR100491978B1 (ko) * | 2003-04-12 | 2005-05-27 | 한국전자통신연구원 | 저 전력 동작이 가능한 상변화 메모리 소자 및 그 제조 방법 |
KR100564608B1 (ko) * | 2004-01-29 | 2006-03-28 | 삼성전자주식회사 | 상변화 메모리 소자 |
JP2005243127A (ja) | 2004-02-25 | 2005-09-08 | Sanyo Electric Co Ltd | 紫外線消去型半導体メモリ装置 |
TWI254443B (en) * | 2004-10-08 | 2006-05-01 | Ind Tech Res Inst | Multilevel phase-change memory, manufacture method and status transferring method thereof |
TWI261915B (en) * | 2005-01-07 | 2006-09-11 | Ind Tech Res Inst | Phase change memory and fabricating method thereof |
-
2007
- 2007-01-31 JP JP2007021409A patent/JP5147249B2/ja active Active
-
2008
- 2008-01-14 CN CN2008100026383A patent/CN101236930B/zh not_active Expired - Fee Related
- 2008-01-28 US US12/020,761 patent/US7655569B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US7655569B2 (en) | 2010-02-02 |
JP2008187129A (ja) | 2008-08-14 |
CN101236930B (zh) | 2010-06-16 |
CN101236930A (zh) | 2008-08-06 |
US20090011603A1 (en) | 2009-01-08 |
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