JP5137310B2 - トレンチ・キャパシタ・アレイを含む構造およびその形成方法(soiチップ用の簡略化した埋込プレート構造およびプロセス) - Google Patents
トレンチ・キャパシタ・アレイを含む構造およびその形成方法(soiチップ用の簡略化した埋込プレート構造およびプロセス) Download PDFInfo
- Publication number
- JP5137310B2 JP5137310B2 JP2006061418A JP2006061418A JP5137310B2 JP 5137310 B2 JP5137310 B2 JP 5137310B2 JP 2006061418 A JP2006061418 A JP 2006061418A JP 2006061418 A JP2006061418 A JP 2006061418A JP 5137310 B2 JP5137310 B2 JP 5137310B2
- Authority
- JP
- Japan
- Prior art keywords
- trench
- layer
- semiconductor region
- unitary
- buried
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
- H10B12/0387—Making the trench
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/01—Manufacture or treatment
- H10D1/045—Manufacture or treatment of capacitors having potential barriers, e.g. varactors
- H10D1/047—Manufacture or treatment of capacitors having potential barriers, e.g. varactors of conductor-insulator-semiconductor capacitors, e.g. trench capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/62—Capacitors having potential barriers
- H10D1/66—Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
- H10D1/665—Trench conductor-insulator-semiconductor capacitors, e.g. trench MOS capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
- H10B12/0383—Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
- H10B12/0385—Making a connection between the transistor and the capacitor, e.g. buried strap
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/906808 | 2005-03-08 | ||
| US10/906,808 US8053823B2 (en) | 2005-03-08 | 2005-03-08 | Simplified buried plate structure and process for semiconductor-on-insulator chip |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006253684A JP2006253684A (ja) | 2006-09-21 |
| JP2006253684A5 JP2006253684A5 (enExample) | 2008-12-04 |
| JP5137310B2 true JP5137310B2 (ja) | 2013-02-06 |
Family
ID=36969918
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006061418A Expired - Fee Related JP5137310B2 (ja) | 2005-03-08 | 2006-03-07 | トレンチ・キャパシタ・アレイを含む構造およびその形成方法(soiチップ用の簡略化した埋込プレート構造およびプロセス) |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8053823B2 (enExample) |
| JP (1) | JP5137310B2 (enExample) |
| CN (1) | CN1832183A (enExample) |
| TW (1) | TW200711149A (enExample) |
Families Citing this family (35)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070045698A1 (en) * | 2005-08-31 | 2007-03-01 | International Business Machines Corporation | Semiconductor structures with body contacts and fabrication methods thereof |
| US20070045697A1 (en) * | 2005-08-31 | 2007-03-01 | International Business Machines Corporation | Body-contacted semiconductor structures and methods of fabricating such body-contacted semiconductor structures |
| US7626257B2 (en) * | 2006-01-18 | 2009-12-01 | Infineon Technologies Ag | Semiconductor devices and methods of manufacture thereof |
| US7595262B2 (en) * | 2006-10-27 | 2009-09-29 | Qimonda Ag | Manufacturing method for an integrated semiconductor structure |
| US7564096B2 (en) * | 2007-02-09 | 2009-07-21 | Fairchild Semiconductor Corporation | Scalable power field effect transistor with improved heavy body structure and method of manufacture |
| US7808028B2 (en) * | 2007-04-18 | 2010-10-05 | International Business Machines Corporation | Trench structure and method of forming trench structure |
| US7713814B2 (en) * | 2008-01-04 | 2010-05-11 | International Business Machines Corporation | Hybrid orientation substrate compatible deep trench capacitor embedded DRAM |
| US7888723B2 (en) * | 2008-01-18 | 2011-02-15 | International Business Machines Corporation | Deep trench capacitor in a SOI substrate having a laterally protruding buried strap |
| US7384842B1 (en) * | 2008-02-14 | 2008-06-10 | International Business Machines Corporation | Methods involving silicon-on-insulator trench memory with implanted plate |
| US7910451B2 (en) * | 2008-04-04 | 2011-03-22 | International Business Machines Corporation | Simultaneous buried strap and buried contact via formation for SOI deep trench capacitor |
| US9059319B2 (en) * | 2010-01-25 | 2015-06-16 | International Business Machines Corporation | Embedded dynamic random access memory device and method |
| US8298908B2 (en) * | 2010-02-11 | 2012-10-30 | International Business Machines Corporation | Structure and method for forming isolation and buried plate for trench capacitor |
| US8354675B2 (en) * | 2010-05-07 | 2013-01-15 | International Business Machines Corporation | Enhanced capacitance deep trench capacitor for EDRAM |
| US8652925B2 (en) | 2010-07-19 | 2014-02-18 | International Business Machines Corporation | Method of fabricating isolated capacitors and structure thereof |
| US8232163B2 (en) | 2010-11-01 | 2012-07-31 | International Business Machines Corporation | Lateral epitaxial grown SOI in deep trench structures and methods of manufacture |
| US8647945B2 (en) | 2010-12-03 | 2014-02-11 | International Business Machines Corporation | Method of forming substrate contact for semiconductor on insulator (SOI) substrate |
| TWI415264B (zh) * | 2011-02-17 | 2013-11-11 | Anpec Electronics Corp | Dyed transistor with thick underlying dielectric layer and method for making the same |
| EP2498280B1 (en) * | 2011-03-11 | 2020-04-29 | Soitec | DRAM with trench capacitors and logic back-biased transistors integrated on an SOI substrate comprising an intrinsic semiconductor layer and manufacturing method thereof |
| US9307701B2 (en) | 2011-03-24 | 2016-04-12 | Dirtt Environmental Solutions, Ltd | Modular walls with incorporated planters |
| US9142508B2 (en) * | 2011-06-27 | 2015-09-22 | Tessera, Inc. | Single exposure in multi-damascene process |
| US20130043559A1 (en) * | 2011-08-17 | 2013-02-21 | International Business Machines Corporation | Trench formation in substrate |
| US8586444B2 (en) * | 2012-03-23 | 2013-11-19 | International Business Machines Corporation | Creating deep trenches on underlying substrate |
| US8557657B1 (en) * | 2012-05-18 | 2013-10-15 | International Business Machines Corporation | Retrograde substrate for deep trench capacitors |
| TW201403782A (zh) | 2012-07-04 | 2014-01-16 | 財團法人工業技術研究院 | 基底穿孔的製造方法、矽穿孔結構及其電容控制方法 |
| US8927989B2 (en) * | 2012-11-28 | 2015-01-06 | International Business Machines Corporation | Voltage contrast inspection of deep trench isolation |
| US9412640B2 (en) | 2013-01-25 | 2016-08-09 | GlobalFoundries, Inc. | Semiconductor device including substrate contact and related method |
| US9252242B2 (en) * | 2013-03-25 | 2016-02-02 | International Business Machines Corporation | Semiconductor structure with deep trench thermal conduction |
| CN103456620B (zh) * | 2013-09-11 | 2016-03-02 | 中微半导体设备(上海)有限公司 | 半导体结构的形成方法 |
| ITUA20162174A1 (it) * | 2016-03-31 | 2017-10-01 | St Microelectronics Srl | Procedimento di fabbricazione di un sensore di pressione mems e relativo sensore di pressione mems |
| US11121207B2 (en) * | 2016-11-10 | 2021-09-14 | Texas Instruments Incorporated | Integrated trench capacitor with top plate having reduced voids |
| US10043824B2 (en) | 2016-12-15 | 2018-08-07 | Vanguard International Semiconductor Corporation | Semiconductor device including a vacuum gap and method for manufacturing the same |
| EP3828932B1 (en) * | 2019-11-29 | 2022-09-07 | Infineon Technologies Dresden GmbH & Co . KG | Method for manufacturing a sensor device with a buried deep trench structure and sensor device |
| CN113497006B (zh) * | 2020-03-20 | 2024-12-13 | 中芯国际集成电路制造(北京)有限公司 | 电容结构及其形成方法 |
| US12015051B2 (en) * | 2021-09-30 | 2024-06-18 | Macom Technology Solutions Holdings, Inc. | Semiconductor device and method of forming monolithic surge protection resistor |
| CN116544283B (zh) * | 2023-04-28 | 2024-06-14 | 上海朗矽科技有限公司 | 嵌入式电容器及嵌入式电容器的制作方法 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0563155A (ja) * | 1991-08-30 | 1993-03-12 | Texas Instr Japan Ltd | 半導体装置及びその製造方法 |
| JP3439493B2 (ja) * | 1992-12-01 | 2003-08-25 | 沖電気工業株式会社 | 半導体記憶装置の製造方法 |
| JP3301170B2 (ja) * | 1993-08-09 | 2002-07-15 | ソニー株式会社 | 半導体装置の製法 |
| JPH08274276A (ja) * | 1995-03-31 | 1996-10-18 | Toshiba Corp | 半導体装置およびその製造方法 |
| US6387772B1 (en) | 2000-04-25 | 2002-05-14 | Agere Systems Guardian Corp. | Method for forming trench capacitors in SOI substrates |
| JP2003007856A (ja) | 2001-06-26 | 2003-01-10 | Toshiba Corp | 半導体装置及びその製造方法 |
| US6870210B2 (en) * | 2002-08-22 | 2005-03-22 | Micron Technology, Inc. | Dual-sided capacitor |
| DE10257873B3 (de) | 2002-12-11 | 2004-06-17 | Infineon Technologies Ag | Dynamische Speicherzelle und Verfahren zur Herstellung derselben |
| US6964897B2 (en) * | 2003-06-09 | 2005-11-15 | International Business Machines Corporation | SOI trench capacitor cell incorporating a low-leakage floating body array transistor |
| US7091081B2 (en) * | 2004-05-21 | 2006-08-15 | International Business Machines Corporation | Method for patterning a semiconductor region |
-
2005
- 2005-03-08 US US10/906,808 patent/US8053823B2/en active Active
-
2006
- 2006-02-23 CN CNA2006100577211A patent/CN1832183A/zh active Pending
- 2006-03-06 TW TW095107390A patent/TW200711149A/zh unknown
- 2006-03-07 JP JP2006061418A patent/JP5137310B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US8053823B2 (en) | 2011-11-08 |
| CN1832183A (zh) | 2006-09-13 |
| US20060202249A1 (en) | 2006-09-14 |
| JP2006253684A (ja) | 2006-09-21 |
| TW200711149A (en) | 2007-03-16 |
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