JP5121353B2 - オーバーモールドされたｍｃｍｉｃパッケージ及びその製造方法 - Google Patents

オーバーモールドされたｍｃｍｉｃパッケージ及びその製造方法 Download PDF

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Publication number
JP5121353B2
JP5121353B2 JP2007212015A JP2007212015A JP5121353B2 JP 5121353 B2 JP5121353 B2 JP 5121353B2 JP 2007212015 A JP2007212015 A JP 2007212015A JP 2007212015 A JP2007212015 A JP 2007212015A JP 5121353 B2 JP5121353 B2 JP 5121353B2
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Japan
Prior art keywords
lid
package
chimney
overmold
polymeric material
Prior art date
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Active
Application number
JP2007212015A
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English (en)
Japanese (ja)
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JP2008047918A5 (https=
JP2008047918A (ja
Inventor
ビー．クリスペル ロバート
スコット キストラー ロバート
ダブリュ．オーゼンバッハ ジョン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agere Systems LLC
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Agere Systems LLC
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Publication date
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Publication of JP2008047918A publication Critical patent/JP2008047918A/ja
Publication of JP2008047918A5 publication Critical patent/JP2008047918A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP2007212015A 2006-08-16 2007-08-16 オーバーモールドされたｍｃｍｉｃパッケージ及びその製造方法 Active JP5121353B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/505152 2006-08-16
US11/505,152 US7423341B2 (en) 2006-08-16 2006-08-16 Plastic overmolded packages with mechanically decoupled lid attach attachment

Publications (3)

Publication Number Publication Date
JP2008047918A JP2008047918A (ja) 2008-02-28
JP2008047918A5 JP2008047918A5 (https=) 2010-07-22
JP5121353B2 true JP5121353B2 (ja) 2013-01-16

Family

ID=39095325

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007212015A Active JP5121353B2 (ja) 2006-08-16 2007-08-16 オーバーモールドされたｍｃｍｉｃパッケージ及びその製造方法

Country Status (4)

Country Link
US (2) US7423341B2 (https=)
JP (1) JP5121353B2 (https=)
KR (1) KR101398404B1 (https=)
CN (1) CN101127349B (https=)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7423341B2 (en) * 2006-08-16 2008-09-09 Agere Systems Inc. Plastic overmolded packages with mechanically decoupled lid attach attachment
KR101221807B1 (ko) * 2006-12-29 2013-01-14 페어차일드코리아반도체 주식회사 전력 소자 패키지
CN101779006B (zh) 2007-08-10 2012-09-26 日产自动车株式会社 可变气门装置
US7781682B2 (en) * 2008-03-31 2010-08-24 Intel Corporation Methods of fabricating multichip packages and structures formed thereby
US7829390B2 (en) * 2008-11-20 2010-11-09 Azurewave Technologies, Inc. Packaging structure of SIP and a manufacturing method thereof
US8362607B2 (en) * 2009-06-03 2013-01-29 Honeywell International Inc. Integrated circuit package including a thermally and electrically conductive package lid
FR2968126A1 (fr) * 2010-11-29 2012-06-01 St Microelectronics Grenoble 2 Boitier semi-conducteur a via thermique et procédé de fabrication
US9562534B2 (en) * 2012-05-04 2017-02-07 Ghsp, Inc. In-line dual pump and motor with control device
US9202772B2 (en) * 2013-02-28 2015-12-01 Altera Corporation Heat pipe in overmolded flip chip package
US20170356640A1 (en) 2016-06-10 2017-12-14 Innotec, Corp. Illumination assembly including thermal energy management
KR102617088B1 (ko) 2019-09-18 2023-12-26 삼성전자주식회사 반도체 패키지
US20230137512A1 (en) * 2021-11-03 2023-05-04 Western Digital Technologies, Inc. Stacked ssd semiconductor device

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06132425A (ja) * 1992-10-22 1994-05-13 Kyocera Corp 半導体装置
JPH0758254A (ja) * 1993-08-19 1995-03-03 Fujitsu Ltd マルチチップモジュール及びその製造方法
JPH0878618A (ja) * 1994-09-08 1996-03-22 Fujitsu Ltd マルチチップモジュール及びその製造方法
US5886408A (en) * 1994-09-08 1999-03-23 Fujitsu Limited Multi-chip semiconductor device
US5610442A (en) * 1995-03-27 1997-03-11 Lsi Logic Corporation Semiconductor device package fabrication method and apparatus
JPH0964252A (ja) * 1995-08-25 1997-03-07 Hitachi Ltd 半導体装置
US5587882A (en) * 1995-08-30 1996-12-24 Hewlett-Packard Company Thermal interface for a heat sink and a plurality of integrated circuits mounted on a substrate
US6238954B1 (en) * 1999-09-28 2001-05-29 Intel Corporation COF packaged semiconductor
US6535388B1 (en) * 2001-10-04 2003-03-18 Intel Corporation Wirebonded microelectronic packages including heat dissipation devices for heat removal from active surfaces thereof
US6987032B1 (en) * 2002-07-19 2006-01-17 Asat Ltd. Ball grid array package and process for manufacturing same
JP2004289059A (ja) 2003-03-25 2004-10-14 Denso Corp 半導体装置
US7153725B2 (en) * 2004-01-27 2006-12-26 St Assembly Test Services Ltd. Strip-fabricated flip chip in package and flip chip in system heat spreader assemblies and fabrication methods therefor
US20070278666A1 (en) * 2004-04-13 2007-12-06 Jean-Charles Garcia Method for Production of Electronic and Optoelectronic Circuits
TWI246757B (en) * 2004-10-27 2006-01-01 Siliconware Precision Industries Co Ltd Semiconductor package with heat sink and fabrication method thereof
US7332823B2 (en) * 2005-12-15 2008-02-19 Intel Corporation Providing a metal layer in a semiconductor package
US7332807B2 (en) * 2005-12-30 2008-02-19 Intel Corporation Chip package thermal interface materials with dielectric obstructions for body-biasing, methods of using same, and systems containing same
US7423341B2 (en) * 2006-08-16 2008-09-09 Agere Systems Inc. Plastic overmolded packages with mechanically decoupled lid attach attachment

Also Published As

Publication number Publication date
US20080311700A1 (en) 2008-12-18
US7632717B2 (en) 2009-12-15
CN101127349A (zh) 2008-02-20
KR101398404B1 (ko) 2014-05-26
JP2008047918A (ja) 2008-02-28
KR20080015725A (ko) 2008-02-20
US20080042262A1 (en) 2008-02-21
US7423341B2 (en) 2008-09-09
CN101127349B (zh) 2011-11-16

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