JP5102652B2 - 発光装置 - Google Patents
発光装置 Download PDFInfo
- Publication number
- JP5102652B2 JP5102652B2 JP2008044861A JP2008044861A JP5102652B2 JP 5102652 B2 JP5102652 B2 JP 5102652B2 JP 2008044861 A JP2008044861 A JP 2008044861A JP 2008044861 A JP2008044861 A JP 2008044861A JP 5102652 B2 JP5102652 B2 JP 5102652B2
- Authority
- JP
- Japan
- Prior art keywords
- light
- substrate
- detection element
- led chip
- emitting device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Led Device Packages (AREA)
Description
2 実装基板
2a 収納凹所
2c 突出部
4 光検出素子
6 温度検出素子
6a p形領域
6b n形領域
20 ベース基板
20a シリコン基板
23 絶縁膜
26 サーマルビア
30a シリコン基板
31 開口窓
40 光検出素子形成基板
40a シリコン基板
41 光取出窓
61a 電極
61b 電極
Claims (2)
- LEDチップと、前記LEDチップを実装した実装基板と、前記実装基板に形成され前記LEDチップから放射される光を検出する光検出素子と、前記実装基板に形成され前記LEDチップの温度を検出する温度検出素子と、前記LEDチップの光出力を制御する駆動回路と、前記温度検出素子の出力に基づいて前記光検出素子の出力を補正し当該補正した出力が目標値に保たれるように前記駆動回路をフィードバック制御する制御回路とを備え、前記実装基板は、半導体基板を用いて形成されたものであり、厚み方向に貫通し前記LEDチップに熱結合される複数のサーマルビアが形成され、前記温度検出素子は、前記実装基板においてp形領域とn形領域とが形成されたダイオードからなり、前記p形領域および前記n形領域それぞれが互いに電気的に絶縁された前記サーマルビアに熱結合されてなることを特徴とする発光装置。
- 前記温度検出素子は、前記実装基板において前記LEDチップの直下に設けられてなることを特徴とする請求項1記載の発光装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008044861A JP5102652B2 (ja) | 2008-02-26 | 2008-02-26 | 発光装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008044861A JP5102652B2 (ja) | 2008-02-26 | 2008-02-26 | 発光装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009206185A JP2009206185A (ja) | 2009-09-10 |
JP5102652B2 true JP5102652B2 (ja) | 2012-12-19 |
Family
ID=41148190
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008044861A Active JP5102652B2 (ja) | 2008-02-26 | 2008-02-26 | 発光装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5102652B2 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5021784B2 (ja) | 2010-04-01 | 2012-09-12 | シャープ株式会社 | 発光測定装置および発光測定方法、制御プログラム、可読記録媒体 |
KR101593631B1 (ko) * | 2014-01-24 | 2016-02-12 | 광운대학교 산학협력단 | 발광 소자 패키지 및 그 제조 방법 |
JP6387911B2 (ja) * | 2015-06-30 | 2018-09-12 | 株式会社デンソー | 電子装置 |
WO2022118750A1 (ja) * | 2020-12-04 | 2022-06-09 | 株式会社小糸製作所 | 光源ユニット |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6213088A (ja) * | 1985-07-10 | 1987-01-21 | Matsushita Electric Ind Co Ltd | 発光半導体装置 |
JPH10319279A (ja) * | 1997-05-16 | 1998-12-04 | Oki Electric Ind Co Ltd | 光モジュールおよび放熱基板 |
JPWO2005104249A1 (ja) * | 2004-04-21 | 2007-08-30 | 松下電器産業株式会社 | 発光素子駆動用半導体チップ、発光装置、及び照明装置 |
JP5192666B2 (ja) * | 2006-03-28 | 2013-05-08 | パナソニック株式会社 | 発光装置 |
-
2008
- 2008-02-26 JP JP2008044861A patent/JP5102652B2/ja active Active
Also Published As
Publication number | Publication date |
---|---|
JP2009206185A (ja) | 2009-09-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5192666B2 (ja) | 発光装置 | |
JP5243806B2 (ja) | 紫外光発光装置 | |
JP2019530234A (ja) | シリコン制御バックプレーン上に一体化された垂直エミッタ | |
JP5010203B2 (ja) | 発光装置 | |
JP5010198B2 (ja) | 発光装置 | |
JP5010366B2 (ja) | 発光装置 | |
JP5102652B2 (ja) | 発光装置 | |
JP4877239B2 (ja) | 発光装置の製造方法 | |
JP5390938B2 (ja) | 発光装置 | |
JP5010199B2 (ja) | 発光装置 | |
JP5351624B2 (ja) | Ledモジュール | |
JP2009177095A (ja) | 発光装置 | |
JP2009177099A (ja) | 発光装置 | |
JP5249856B2 (ja) | 発光装置 | |
JP2009206186A (ja) | 発光装置 | |
JP5102605B2 (ja) | 発光装置およびその製造方法 | |
JP2011009559A (ja) | 発光装置 | |
JP5475954B2 (ja) | 発光装置 | |
JP5192847B2 (ja) | 発光装置 | |
JP5192667B2 (ja) | 発光装置 | |
JP2009177101A (ja) | 発光装置 | |
JP5351620B2 (ja) | 発光装置 | |
JP2009158506A (ja) | 発光装置 | |
JP2009177100A (ja) | 発光装置 | |
JP5102640B2 (ja) | 発光装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20100811 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20101022 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A712 Effective date: 20120112 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120529 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120531 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120730 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120904 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120928 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20151005 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5102652 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |