JP5063084B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP5063084B2
JP5063084B2 JP2006303068A JP2006303068A JP5063084B2 JP 5063084 B2 JP5063084 B2 JP 5063084B2 JP 2006303068 A JP2006303068 A JP 2006303068A JP 2006303068 A JP2006303068 A JP 2006303068A JP 5063084 B2 JP5063084 B2 JP 5063084B2
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Japan
Prior art keywords
layer
conductive layer
organic compound
substrate
memory element
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Expired - Fee Related
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JP2006303068A
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English (en)
Japanese (ja)
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JP2007158317A (ja
JP2007158317A5 (enrdf_load_stackoverflow
Inventor
直人 楠本
信晴 大澤
幹央 湯川
芳隆 道前
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2006303068A priority Critical patent/JP5063084B2/ja
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Publication of JP2007158317A5 publication Critical patent/JP2007158317A5/ja
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Publication of JP5063084B2 publication Critical patent/JP5063084B2/ja
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  • Electrodes Of Semiconductors (AREA)
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JP2006303068A 2005-11-09 2006-11-08 半導体装置の作製方法 Expired - Fee Related JP5063084B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006303068A JP5063084B2 (ja) 2005-11-09 2006-11-08 半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2005325448 2005-11-09
JP2005325448 2005-11-09
JP2006303068A JP5063084B2 (ja) 2005-11-09 2006-11-08 半導体装置の作製方法

Publications (3)

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JP2007158317A JP2007158317A (ja) 2007-06-21
JP2007158317A5 JP2007158317A5 (enrdf_load_stackoverflow) 2009-11-05
JP5063084B2 true JP5063084B2 (ja) 2012-10-31

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JP2006303068A Expired - Fee Related JP5063084B2 (ja) 2005-11-09 2006-11-08 半導体装置の作製方法

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JP (1) JP5063084B2 (enrdf_load_stackoverflow)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009054219A1 (ja) * 2007-10-25 2009-04-30 Konica Minolta Holdings, Inc. 電極の製造方法及びこれを用いる薄膜トランジスタの製造方法
CN103022012B (zh) 2011-09-21 2017-03-01 株式会社半导体能源研究所 半导体存储装置
JP5843931B2 (ja) * 2014-09-09 2016-01-13 株式会社東芝 不揮発性半導体記憶装置
JP2016164223A (ja) * 2015-03-06 2016-09-08 東ソー株式会社 ポリアリーレンスルフィド系組成物
KR102505880B1 (ko) * 2017-09-06 2023-03-06 삼성디스플레이 주식회사 박막 트랜지스터 및 그 제조방법, 이를 포함하는 표시 장치

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4042182B2 (ja) * 1997-07-03 2008-02-06 セイコーエプソン株式会社 Ｉｃカードの製造方法及び薄膜集積回路装置の製造方法
TW594947B (en) * 2001-10-30 2004-06-21 Semiconductor Energy Lab Semiconductor device and method of manufacturing the same
JP2004241632A (ja) * 2003-02-06 2004-08-26 Seiko Epson Corp 強誘電体メモリおよびその製造方法
US6852586B1 (en) * 2003-10-01 2005-02-08 Advanced Micro Devices, Inc. Self assembly of conducting polymer for formation of polymer memory cell
GB2423869B (en) * 2003-11-28 2007-06-27 Fuji Electric Holdings Co Switching element
JP4963160B2 (ja) * 2003-12-19 2012-06-27 株式会社半導体エネルギー研究所 半導体装置

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JP2007158317A (ja) 2007-06-21

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