JP5001872B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP5001872B2
JP5001872B2 JP2008031543A JP2008031543A JP5001872B2 JP 5001872 B2 JP5001872 B2 JP 5001872B2 JP 2008031543 A JP2008031543 A JP 2008031543A JP 2008031543 A JP2008031543 A JP 2008031543A JP 5001872 B2 JP5001872 B2 JP 5001872B2
Authority
JP
Japan
Prior art keywords
lead
wire
leads
semiconductor chip
suspension
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008031543A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009194059A (ja
JP2009194059A5 (https=
Inventor
茂樹 田中
一人 小笠原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2008031543A priority Critical patent/JP5001872B2/ja
Priority to US12/266,882 priority patent/US7812429B2/en
Publication of JP2009194059A publication Critical patent/JP2009194059A/ja
Priority to US12/883,468 priority patent/US7964941B2/en
Publication of JP2009194059A5 publication Critical patent/JP2009194059A5/ja
Priority to US13/115,639 priority patent/US8148200B2/en
Application granted granted Critical
Publication of JP5001872B2 publication Critical patent/JP5001872B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/433—Shapes or dispositions of deformation-absorbing parts, e.g. leads having meandering shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/424—Cross-sectional shapes
    • H10W70/427—Bent parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07141—Means for applying energy, e.g. ovens or lasers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07521—Aligning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07553—Controlling the environment, e.g. atmosphere composition or temperature changes in shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5366—Shapes of wire connectors the bond wires having kinks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/537—Multiple bond wires having different shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP2008031543A 2008-02-13 2008-02-13 半導体装置 Expired - Fee Related JP5001872B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2008031543A JP5001872B2 (ja) 2008-02-13 2008-02-13 半導体装置
US12/266,882 US7812429B2 (en) 2008-02-13 2008-11-07 Semiconductor device and manufacturing method of the same
US12/883,468 US7964941B2 (en) 2008-02-13 2010-09-16 Semiconductor device and manufacturing method of the same
US13/115,639 US8148200B2 (en) 2008-02-13 2011-05-25 Semiconductor device and manufacturing method of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008031543A JP5001872B2 (ja) 2008-02-13 2008-02-13 半導体装置

Publications (3)

Publication Number Publication Date
JP2009194059A JP2009194059A (ja) 2009-08-27
JP2009194059A5 JP2009194059A5 (https=) 2011-02-10
JP5001872B2 true JP5001872B2 (ja) 2012-08-15

Family

ID=40938194

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008031543A Expired - Fee Related JP5001872B2 (ja) 2008-02-13 2008-02-13 半導体装置

Country Status (2)

Country Link
US (3) US7812429B2 (https=)
JP (1) JP5001872B2 (https=)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8754513B1 (en) * 2008-07-10 2014-06-17 Marvell International Ltd. Lead frame apparatus and method for improved wire bonding
JP5588147B2 (ja) * 2009-10-26 2014-09-10 キヤノン株式会社 半導体装置及び半導体装置を搭載したプリント基板
CN102487025B (zh) * 2010-12-08 2016-07-06 飞思卡尔半导体公司 用于长结合导线的支撑体
CN102891090A (zh) * 2011-07-18 2013-01-23 飞思卡尔半导体公司 半导体器件及其封装方法
US10271448B2 (en) * 2012-08-06 2019-04-23 Investar Corporation Thin leadframe QFN package design of RF front-ends for mobile wireless communication
JP2015070161A (ja) * 2013-09-30 2015-04-13 ローム株式会社 リードフレーム、半導体装置および半導体装置の製造方法
US20150262919A1 (en) * 2014-03-14 2015-09-17 Texas Instruments Incorporated Structure and method of packaged semiconductor devices with qfn leadframes having stress-absorbing protrusions
JP6695156B2 (ja) * 2016-02-02 2020-05-20 エイブリック株式会社 樹脂封止型半導体装置
FR3064817B1 (fr) * 2017-04-04 2021-07-23 United Monolithic Semiconductors Sas Boitier plastique non coplanaire d'encapsulation d'un composant electronique hyperfrequence de puissance
JP6796666B2 (ja) * 2019-02-06 2020-12-09 ローム株式会社 半導体装置
JP7338204B2 (ja) * 2019-04-01 2023-09-05 富士電機株式会社 半導体装置
JP7516980B2 (ja) 2020-08-24 2024-07-17 住友電気工業株式会社 半導体装置
JPWO2023189650A1 (https=) * 2022-03-31 2023-10-05
CN116525594B (zh) * 2023-07-03 2023-10-13 成都爱旗科技有限公司 一种封装结构、方法及电子设备

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01312866A (ja) 1988-06-10 1989-12-18 Nec Kyushu Ltd 半導体装置用リードフレーム
KR100552353B1 (ko) * 1992-03-27 2006-06-20 가부시키가이샤 히타치초엘에스아이시스템즈 리이드프레임및그것을사용한반도체집적회로장치와그제조방법
JPH05304241A (ja) * 1992-04-28 1993-11-16 Hitachi Ltd 半導体装置
JP2000003988A (ja) * 1998-06-15 2000-01-07 Sony Corp リードフレームおよび半導体装置
JP2004095572A (ja) * 2002-08-29 2004-03-25 Hitachi Ltd 半導体装置およびその製造方法
JP4624170B2 (ja) * 2005-04-25 2011-02-02 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US7977774B2 (en) * 2007-07-10 2011-07-12 Amkor Technology, Inc. Fusion quad flat semiconductor package

Also Published As

Publication number Publication date
JP2009194059A (ja) 2009-08-27
US7812429B2 (en) 2010-10-12
US20110001228A1 (en) 2011-01-06
US20090200649A1 (en) 2009-08-13
US7964941B2 (en) 2011-06-21
US8148200B2 (en) 2012-04-03
US20110223719A1 (en) 2011-09-15

Similar Documents

Publication Publication Date Title
JP5001872B2 (ja) 半導体装置
KR100541494B1 (ko) 리드프레임 및 그 제조방법, 수지봉입형 반도체장치 및 그제조방법
US8836106B2 (en) Semiconductor device
CN102201385B (zh) 方形扁平无引线半导体封装及其制作方法
US8981575B2 (en) Semiconductor package structure
TWI515855B (zh) 具有提升接地接合穩定性之引線架封裝
JP2006303371A (ja) 半導体装置の製造方法
KR101286874B1 (ko) 반도체 장치 및 그 제조 방법
JP3851845B2 (ja) 半導体装置
US6692991B2 (en) Resin-encapsulated semiconductor device and method for manufacturing the same
US20190074254A1 (en) Method of assembling qfp type semiconductor device
US20110309483A1 (en) Semiconductor Device
CN107342276B (zh) 半导体器件及相应方法
US6849952B2 (en) Semiconductor device and its manufacturing method
US20110062569A1 (en) Semiconductor device package with down-set leads
JP2002134439A (ja) 半導体チップの製造方法と樹脂封止型半導体装置およびその製造方法
CN101894830B (zh) 堆叠式封装构造及其制造方法
JP4651218B2 (ja) 半導体装置の製造方法
JP2005150294A (ja) 半導体装置およびその製造方法
JP2005135938A (ja) 半導体装置およびその製造方法
JP2005109007A (ja) 半導体装置およびその製造方法
JP2006073904A (ja) 半導体装置、リードフレーム、及びその製造方法
JP2001210668A (ja) 半導体装置およびその製造方法
JP2001168260A (ja) 半導体装置およびその製造方法
JP2006013391A (ja) 半導体装置およびその製造方法

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20100528

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20101216

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20101216

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120131

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120202

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120327

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120424

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120518

R150 Certificate of patent or registration of utility model

Ref document number: 5001872

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150525

Year of fee payment: 3

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees