JP4960807B2 - 可変周波数発振回路 - Google Patents
可変周波数発振回路 Download PDFInfo
- Publication number
- JP4960807B2 JP4960807B2 JP2007220966A JP2007220966A JP4960807B2 JP 4960807 B2 JP4960807 B2 JP 4960807B2 JP 2007220966 A JP2007220966 A JP 2007220966A JP 2007220966 A JP2007220966 A JP 2007220966A JP 4960807 B2 JP4960807 B2 JP 4960807B2
- Authority
- JP
- Japan
- Prior art keywords
- constant current
- circuit
- oscillation circuit
- frequency
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0315—Ring oscillators
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/354—Astable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/00078—Fixed delay
- H03K2005/0013—Avoiding variations of delay due to power supply
Description
RA=R21・・・・・(1)
RB=(R21×R22)/(R21+R22)・・・・・(2)
によって算出される。
I2A=VN23A/RA・・・・・(3)
I2B=VN23B/RB・・・・・(4)
によって算出される。つまり、定電流回路2は、周波数制御信号SFに基づき、定電流I2Aまたは定電流I2Bを流す。トランジスタM21〜M22のカレントミラー比が1:1であるとし、トランジスタM21〜M22のチャネル長変調が十分小さいとすると、トランジスタM21〜M24の電流が等しくなる。図3において、横軸はトランジスタM23のゲートソース間電圧Vgs(電圧VN23)であり、縦軸はトランジスタM23のド
レイン電流Id(定電流I2)であり、線51はφAの時に抵抗RAに流れる定電流I2を示し、線52はφBの時に抵抗RBに流れる定電流I2を示し、線53はトランジスタM23のドレイン電流Idを示している。図3から、φAの時、トランジスタM23は線51及び線53の交点で動作し、トランジスタM23の電流Idは電流I2Aになる。また、φBの時、トランジスタM23は線52〜53の交点で動作し、トランジスタM23の電流Idは電流I2Bになる。
f=I3/(2×C31×V3)・・・・・(5)
によって算出される。
fA=I3A/(2×C31×V3A)・・・・・(6)
fB=I3B/(2×C31×V3B)・・・・・(7)
によって算出される。
I3A=I2A・・・・・(8)
I3B=I2B・・・・・(9)
となる。また、トランジスタM23とトランジスタM32cとトランジスタM34cとのドライブ能力が等しいとすると、定電流インバータIV32及び定電流インバータIV34の反転電圧V3は電圧VN23に等しくなる。すると、
V3A=VN23A・・・・・(10)
V3B=VN23B・・・・・(11)
となる。
fA=I2A/(2×C31×VN23A)・・・・・(12)
fB=I2B/(2×C31×VN23B)・・・・・(13)
となる。式(12)〜(13)に式(3)〜(4)を代入すると、
fA=1/(2×C31×RA)・・・・・(14)
fB=1/(2×C31×RB)・・・・・(15)
となる。すると、周波数fA〜fBの比は、
fB/fA=RA/RB・・・・・(16)
となる。式(16)に式(1)〜(2)を代入すると、
fB/fA=1+(R21/R22)・・・・・(17)
となる。
12、22、33、42 出力端子 2 定電流回路
3 発振回路 4 パルス発生回路
SF 周波数制御信号 SB 定電流制御信号
SP パルス信号 CLK クロック信号
I2〜I3 定電流
Claims (4)
- 可変周波数発振回路において、
発振回路から出力されるクロック信号の周波数を制御するための周波数制御信号に基づき、第一定電流を流す定電流回路と、
前記周波数制御信号がローからハイに切り替わる時及びハイからローに切り替わる時、パルスを発生するパルス発生回路と、
前記第一定電流に基づき、第二定電流を流し、前記パルス発生回路によって前記パルスが発生すると、発振せず、前記パルス発生回路によって前記パルスが発生しないと、前記第二定電流に基づき、前記周波数制御信号に基づいた周波数で発振する前記発振回路と、
を備えていることを特徴とする可変周波数発振回路。 - 前記発振回路は、1個以上のインバータ及び1個以上の容量を有し、リングオシレータ構成の回路であることを特徴とする請求項1記載の可変周波数発振回路。
- 前記発振回路は、前記1個以上の容量の容量値、前記第二定電流の電流値、及び、前記容量の次段に接続された前記インバータにおける出力電圧が反転する時の入力電圧によって決まる周波数で発振することを特徴とする請求項2記載の可変周波数発振回路。
- 前記発振回路は、前記パルスが発生すると、前記1個以上の容量を放電させ、または、前記1個以上の容量を充電し、充放電動作を停止することを特徴とする請求項3記載の可変周波数発振回路。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007220966A JP4960807B2 (ja) | 2007-08-28 | 2007-08-28 | 可変周波数発振回路 |
TW97132822A TWI470924B (zh) | 2007-08-28 | 2008-08-27 | Variable frequency oscillation circuit |
US12/229,805 US7915964B2 (en) | 2007-08-28 | 2008-08-27 | Variable frequency oscillating circuit |
CN2008101714728A CN101388644B (zh) | 2007-08-28 | 2008-08-28 | 可变频振荡电路 |
KR1020080084464A KR101191058B1 (ko) | 2007-08-28 | 2008-08-28 | 가변 주파수 발진 회로 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007220966A JP4960807B2 (ja) | 2007-08-28 | 2007-08-28 | 可変周波数発振回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009055409A JP2009055409A (ja) | 2009-03-12 |
JP4960807B2 true JP4960807B2 (ja) | 2012-06-27 |
Family
ID=40406521
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007220966A Expired - Fee Related JP4960807B2 (ja) | 2007-08-28 | 2007-08-28 | 可変周波数発振回路 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7915964B2 (ja) |
JP (1) | JP4960807B2 (ja) |
KR (1) | KR101191058B1 (ja) |
CN (1) | CN101388644B (ja) |
TW (1) | TWI470924B (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8531248B2 (en) | 2009-02-09 | 2013-09-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | VDD-independent oscillator insensitive to process variation |
CN115118294A (zh) * | 2022-08-05 | 2022-09-27 | 中国科学技术大学 | 基于自适应频率控制的数字隔离器 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58191522A (ja) * | 1982-05-04 | 1983-11-08 | Toshiba Corp | 半導体集積回路の周波数逓倍回路 |
CN85101811B (zh) * | 1985-04-01 | 1988-04-20 | 株式会社日立制作所 | 采样处理视频信号的方法及设备 |
JPH02308616A (ja) * | 1989-05-23 | 1990-12-21 | Nec Eng Ltd | エッジ検出回路 |
JPH0823266A (ja) * | 1994-07-11 | 1996-01-23 | Mitsubishi Electric Corp | 電圧制御発振装置 |
US6223990B1 (en) * | 1995-06-16 | 2001-05-01 | Rohm Co., Ltd. | Communication system including a dual passive antenna configuration |
US5841707A (en) * | 1995-11-29 | 1998-11-24 | Texas Instruments Incorporated | Apparatus and method for a programmable interval timing generator in a semiconductor memory |
JPH10190414A (ja) | 1996-12-24 | 1998-07-21 | Nkk Corp | 可変周波数型リングオシレータ |
JP3904282B2 (ja) * | 1997-03-31 | 2007-04-11 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
JP2000077984A (ja) * | 1998-08-31 | 2000-03-14 | Nec Corp | リングオッシレータと遅延回路 |
US6414522B1 (en) * | 2000-09-14 | 2002-07-02 | Silicon Storage Technology, Inc. | Bias generating circuit for use with an oscillating circuit in an integrated circuit charge pump |
TWI251398B (en) * | 2001-12-28 | 2006-03-11 | Faraday Tech Corp | Resistor-capacitor type oscillator circuit |
JP3742345B2 (ja) * | 2002-01-10 | 2006-02-01 | 富士通株式会社 | オシレータ回路、該オシレータ回路を備えた半導体装置、及び該オシレータ回路を備えた半導体記憶装置 |
US6809605B2 (en) * | 2002-01-10 | 2004-10-26 | Fujitsu Limited | Oscillator circuit, semiconductor device and semiconductor memory device provided with the oscillator circuit, and control method of the oscillator circuit |
TWI281787B (en) * | 2003-11-25 | 2007-05-21 | Sanyo Electric Co | Oscillation circuit |
US7255476B2 (en) * | 2004-04-14 | 2007-08-14 | International Business Machines Corporation | On chip temperature measuring and monitoring circuit and method |
KR100631167B1 (ko) * | 2004-12-30 | 2006-10-02 | 주식회사 하이닉스반도체 | 셀프 리프레쉬 주기 발생장치 및 그 오실레이션 신호발생방법 |
FR2882871A1 (fr) * | 2005-03-01 | 2006-09-08 | Atmel Corp | Oscillateur commande en tension a multiphase realignee et boucle a phase asservie associee |
US7391274B2 (en) * | 2005-03-30 | 2008-06-24 | Etron Technology, Inc | Low voltage operating ring oscillator with almost constant delay time |
JP2007104489A (ja) * | 2005-10-06 | 2007-04-19 | Seiko Epson Corp | リングオシレータのイニシャル信号生成回路 |
-
2007
- 2007-08-28 JP JP2007220966A patent/JP4960807B2/ja not_active Expired - Fee Related
-
2008
- 2008-08-27 US US12/229,805 patent/US7915964B2/en not_active Expired - Fee Related
- 2008-08-27 TW TW97132822A patent/TWI470924B/zh not_active IP Right Cessation
- 2008-08-28 KR KR1020080084464A patent/KR101191058B1/ko active IP Right Grant
- 2008-08-28 CN CN2008101714728A patent/CN101388644B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
TW200929850A (en) | 2009-07-01 |
CN101388644A (zh) | 2009-03-18 |
TWI470924B (zh) | 2015-01-21 |
JP2009055409A (ja) | 2009-03-12 |
US20090058542A1 (en) | 2009-03-05 |
CN101388644B (zh) | 2012-07-04 |
KR101191058B1 (ko) | 2012-10-15 |
US7915964B2 (en) | 2011-03-29 |
KR20090023220A (ko) | 2009-03-04 |
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