JP4932856B2 - 集積回路の動作パラメータを調整するための装置及び方法 - Google Patents

集積回路の動作パラメータを調整するための装置及び方法 Download PDF

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Publication number
JP4932856B2
JP4932856B2 JP2008557438A JP2008557438A JP4932856B2 JP 4932856 B2 JP4932856 B2 JP 4932856B2 JP 2008557438 A JP2008557438 A JP 2008557438A JP 2008557438 A JP2008557438 A JP 2008557438A JP 4932856 B2 JP4932856 B2 JP 4932856B2
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memory
speed
shift register
integrated circuit
logic
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Japanese (ja)
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JP2009528635A (ja
JP2009528635A5 (enExample
Inventor
エイ. ケレシ、クァダー
ディ. バーネット、ジェームズ
エム. ヒグマン、ジャック
ジュウ、トマス
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NXP USA Inc
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NXP USA Inc
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3275Power saving in memory, e.g. RAM, cache
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
  • Power Sources (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2008557438A 2006-03-02 2007-01-29 集積回路の動作パラメータを調整するための装置及び方法 Expired - Fee Related JP4932856B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/366,286 US7483327B2 (en) 2006-03-02 2006-03-02 Apparatus and method for adjusting an operating parameter of an integrated circuit
US11/366,286 2006-03-02
PCT/US2007/061189 WO2007117745A2 (en) 2006-03-02 2007-01-29 Apparatus and method for adjusting an operating parameter of an integrated circuit

Publications (3)

Publication Number Publication Date
JP2009528635A JP2009528635A (ja) 2009-08-06
JP2009528635A5 JP2009528635A5 (enExample) 2010-03-18
JP4932856B2 true JP4932856B2 (ja) 2012-05-16

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JP2008557438A Expired - Fee Related JP4932856B2 (ja) 2006-03-02 2007-01-29 集積回路の動作パラメータを調整するための装置及び方法

Country Status (6)

Country Link
US (1) US7483327B2 (enExample)
EP (1) EP1994420B1 (enExample)
JP (1) JP4932856B2 (enExample)
KR (1) KR101367063B1 (enExample)
TW (1) TWI459403B (enExample)
WO (1) WO2007117745A2 (enExample)

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US7911834B2 (en) * 2006-05-15 2011-03-22 Apple Inc. Analog interface for a flash memory die
US7701797B2 (en) * 2006-05-15 2010-04-20 Apple Inc. Two levels of voltage regulation supplied for logic and data programming voltage of a memory device
US7511646B2 (en) * 2006-05-15 2009-03-31 Apple Inc. Use of 8-bit or higher A/D for NAND cell value
US7568135B2 (en) * 2006-05-15 2009-07-28 Apple Inc. Use of alternative value in cell detection
US8000134B2 (en) 2006-05-15 2011-08-16 Apple Inc. Off-die charge pump that supplies multiple flash devices
US7639542B2 (en) * 2006-05-15 2009-12-29 Apple Inc. Maintenance operations for multi-level data storage cells
US7852690B2 (en) * 2006-05-15 2010-12-14 Apple Inc. Multi-chip package for a flash memory
US7613043B2 (en) * 2006-05-15 2009-11-03 Apple Inc. Shifting reference values to account for voltage sag
US7546410B2 (en) * 2006-07-26 2009-06-09 International Business Machines Corporation Self timed memory chip having an apportionable data bus
US8050781B2 (en) * 2007-06-29 2011-11-01 Emulex Design & Manufacturing Corporation Systems and methods for ASIC power consumption reduction
JP5228468B2 (ja) * 2007-12-17 2013-07-03 富士通セミコンダクター株式会社 システム装置およびシステム装置の動作方法
US7684263B2 (en) * 2008-01-17 2010-03-23 International Business Machines Corporation Method and circuit for implementing enhanced SRAM write and read performance ring oscillator
US7852692B2 (en) * 2008-06-30 2010-12-14 Freescale Semiconductor, Inc. Memory operation testing
US8909957B2 (en) * 2010-11-04 2014-12-09 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Dynamic voltage adjustment to computer system memory
KR20130021175A (ko) 2011-08-22 2013-03-05 삼성전자주식회사 메모리 장치 및 이를 포함하는 장치들
US8717831B2 (en) 2012-04-30 2014-05-06 Hewlett-Packard Development Company, L.P. Memory circuit
US9105328B2 (en) * 2012-07-31 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Tracking signals in memory write or read operation
EP2932506A4 (en) * 2012-12-11 2016-08-10 Hewlett Packard Entpr Dev Lp DATA OPERATION IN A SHIFT REGISTER CYCLE
EP2932505A4 (en) 2013-03-28 2016-08-10 Hewlett Packard Entpr Dev Lp DEVICE AND METHOD FOR READING A MEMORY DEVICE
KR20150043122A (ko) * 2013-10-14 2015-04-22 에스케이하이닉스 주식회사 반도체 장치
US9858217B1 (en) * 2016-06-29 2018-01-02 Qualcomm Incorporated Within-die special oscillator for tracking SRAM memory performance with global process variation, voltage and temperature
US11196574B2 (en) * 2017-08-17 2021-12-07 Taiwan Semiconductor Manufacturing Company, Ltd. Physically unclonable function (PUF) generation
US11294678B2 (en) 2018-05-29 2022-04-05 Advanced Micro Devices, Inc. Scheduler queue assignment
US11334384B2 (en) * 2019-12-10 2022-05-17 Advanced Micro Devices, Inc. Scheduler queue assignment burst mode
KR20220022618A (ko) 2020-08-19 2022-02-28 에스케이하이닉스 주식회사 클록 모니터링 회로
US11948000B2 (en) 2020-10-27 2024-04-02 Advanced Micro Devices, Inc. Gang scheduling for low-latency task synchronization
CN114705973B (zh) * 2022-06-01 2022-11-11 北京航空航天大学杭州创新研究院 非侵入式的复杂环境集成电路老化监测方法

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JP2002244917A (ja) * 2001-02-15 2002-08-30 Matsushita Electric Ind Co Ltd アクセス管理装置、およびプログラム

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JPH04190389A (ja) * 1990-11-26 1992-07-08 Hitachi Ltd 画像表示装置のルックアップテーブル書換え方式
JP2002244917A (ja) * 2001-02-15 2002-08-30 Matsushita Electric Ind Co Ltd アクセス管理装置、およびプログラム

Also Published As

Publication number Publication date
KR101367063B1 (ko) 2014-02-24
EP1994420B1 (en) 2016-09-28
WO2007117745A2 (en) 2007-10-18
KR20080100474A (ko) 2008-11-18
US7483327B2 (en) 2009-01-27
JP2009528635A (ja) 2009-08-06
TW200739604A (en) 2007-10-16
WO2007117745A3 (en) 2008-05-22
TWI459403B (zh) 2014-11-01
EP1994420A4 (en) 2013-06-05
US20070220388A1 (en) 2007-09-20
EP1994420A2 (en) 2008-11-26

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