TWI459403B - 調整積體電路之操作參數之方法及裝置 - Google Patents

調整積體電路之操作參數之方法及裝置 Download PDF

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Publication number
TWI459403B
TWI459403B TW096105319A TW96105319A TWI459403B TW I459403 B TWI459403 B TW I459403B TW 096105319 A TW096105319 A TW 096105319A TW 96105319 A TW96105319 A TW 96105319A TW I459403 B TWI459403 B TW I459403B
Authority
TW
Taiwan
Prior art keywords
memory
speed
logic
memory access
shift register
Prior art date
Application number
TW096105319A
Other languages
English (en)
Chinese (zh)
Other versions
TW200739604A (en
Inventor
Qadeer A Qureshi
James D Burnett
Jack M Higman
Thomas Jew
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200739604A publication Critical patent/TW200739604A/zh
Application granted granted Critical
Publication of TWI459403B publication Critical patent/TWI459403B/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
  • Power Sources (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
TW096105319A 2006-03-02 2007-02-13 調整積體電路之操作參數之方法及裝置 TWI459403B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/366,286 US7483327B2 (en) 2006-03-02 2006-03-02 Apparatus and method for adjusting an operating parameter of an integrated circuit

Publications (2)

Publication Number Publication Date
TW200739604A TW200739604A (en) 2007-10-16
TWI459403B true TWI459403B (zh) 2014-11-01

Family

ID=38519422

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096105319A TWI459403B (zh) 2006-03-02 2007-02-13 調整積體電路之操作參數之方法及裝置

Country Status (6)

Country Link
US (1) US7483327B2 (enExample)
EP (1) EP1994420B1 (enExample)
JP (1) JP4932856B2 (enExample)
KR (1) KR101367063B1 (enExample)
TW (1) TWI459403B (enExample)
WO (1) WO2007117745A2 (enExample)

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US7911834B2 (en) * 2006-05-15 2011-03-22 Apple Inc. Analog interface for a flash memory die
US7701797B2 (en) * 2006-05-15 2010-04-20 Apple Inc. Two levels of voltage regulation supplied for logic and data programming voltage of a memory device
US7511646B2 (en) * 2006-05-15 2009-03-31 Apple Inc. Use of 8-bit or higher A/D for NAND cell value
US7568135B2 (en) * 2006-05-15 2009-07-28 Apple Inc. Use of alternative value in cell detection
US8000134B2 (en) 2006-05-15 2011-08-16 Apple Inc. Off-die charge pump that supplies multiple flash devices
US7639542B2 (en) * 2006-05-15 2009-12-29 Apple Inc. Maintenance operations for multi-level data storage cells
US7852690B2 (en) * 2006-05-15 2010-12-14 Apple Inc. Multi-chip package for a flash memory
US7613043B2 (en) * 2006-05-15 2009-11-03 Apple Inc. Shifting reference values to account for voltage sag
US7546410B2 (en) * 2006-07-26 2009-06-09 International Business Machines Corporation Self timed memory chip having an apportionable data bus
US8050781B2 (en) * 2007-06-29 2011-11-01 Emulex Design & Manufacturing Corporation Systems and methods for ASIC power consumption reduction
JP5228468B2 (ja) * 2007-12-17 2013-07-03 富士通セミコンダクター株式会社 システム装置およびシステム装置の動作方法
US7684263B2 (en) * 2008-01-17 2010-03-23 International Business Machines Corporation Method and circuit for implementing enhanced SRAM write and read performance ring oscillator
US7852692B2 (en) * 2008-06-30 2010-12-14 Freescale Semiconductor, Inc. Memory operation testing
US8909957B2 (en) * 2010-11-04 2014-12-09 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Dynamic voltage adjustment to computer system memory
KR20130021175A (ko) 2011-08-22 2013-03-05 삼성전자주식회사 메모리 장치 및 이를 포함하는 장치들
US8717831B2 (en) 2012-04-30 2014-05-06 Hewlett-Packard Development Company, L.P. Memory circuit
US9105328B2 (en) * 2012-07-31 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Tracking signals in memory write or read operation
EP2932506A4 (en) * 2012-12-11 2016-08-10 Hewlett Packard Entpr Dev Lp DATA OPERATION IN A SHIFT REGISTER CYCLE
EP2932505A4 (en) 2013-03-28 2016-08-10 Hewlett Packard Entpr Dev Lp DEVICE AND METHOD FOR READING A MEMORY DEVICE
KR20150043122A (ko) * 2013-10-14 2015-04-22 에스케이하이닉스 주식회사 반도체 장치
US9858217B1 (en) * 2016-06-29 2018-01-02 Qualcomm Incorporated Within-die special oscillator for tracking SRAM memory performance with global process variation, voltage and temperature
US11196574B2 (en) * 2017-08-17 2021-12-07 Taiwan Semiconductor Manufacturing Company, Ltd. Physically unclonable function (PUF) generation
US11294678B2 (en) 2018-05-29 2022-04-05 Advanced Micro Devices, Inc. Scheduler queue assignment
US11334384B2 (en) * 2019-12-10 2022-05-17 Advanced Micro Devices, Inc. Scheduler queue assignment burst mode
KR20220022618A (ko) 2020-08-19 2022-02-28 에스케이하이닉스 주식회사 클록 모니터링 회로
US11948000B2 (en) 2020-10-27 2024-04-02 Advanced Micro Devices, Inc. Gang scheduling for low-latency task synchronization
CN114705973B (zh) * 2022-06-01 2022-11-11 北京航空航天大学杭州创新研究院 非侵入式的复杂环境集成电路老化监测方法

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US6269043B1 (en) * 2000-07-31 2001-07-31 Cisco Technology, Inc. Power conservation system employing a snooze mode
US6327224B1 (en) * 2000-06-16 2001-12-04 International Business Machines Corporation On-chip method for measuring access time and data-pin spread
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US6643204B1 (en) * 2001-05-16 2003-11-04 Lsi Logic Corporation Self-time scheme to reduce cycle time for memories
US20050066330A1 (en) * 2003-08-14 2005-03-24 Tatsunori Kanai Method and system for performing real-time operation
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US20050289489A1 (en) * 2004-06-28 2005-12-29 Kim Neil Y On-board performance monitor and power control system
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Patent Citations (9)

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Publication number Priority date Publication date Assignee Title
DE10025250A1 (de) * 1999-07-16 2001-01-25 Mitsubishi Electric Corp Mikrocomputer und Speicherzugriffs-Steuerverfahren
US6327224B1 (en) * 2000-06-16 2001-12-04 International Business Machines Corporation On-chip method for measuring access time and data-pin spread
US6269043B1 (en) * 2000-07-31 2001-07-31 Cisco Technology, Inc. Power conservation system employing a snooze mode
US6643204B1 (en) * 2001-05-16 2003-11-04 Lsi Logic Corporation Self-time scheme to reduce cycle time for memories
US20020191446A1 (en) * 2001-06-15 2002-12-19 Fujitsu Limited Semiconductor memory device having self-timing circuit
US6985375B2 (en) * 2003-06-11 2006-01-10 Micron Technology, Inc. Adjusting the frequency of an oscillator for use in a resistive sense amp
US20050066330A1 (en) * 2003-08-14 2005-03-24 Tatsunori Kanai Method and system for performing real-time operation
US20050283630A1 (en) * 2004-06-21 2005-12-22 Fujitsu Limited Changing of operating voltage in semiconductor integrated circuit
US20050289489A1 (en) * 2004-06-28 2005-12-29 Kim Neil Y On-board performance monitor and power control system

Also Published As

Publication number Publication date
KR101367063B1 (ko) 2014-02-24
EP1994420B1 (en) 2016-09-28
WO2007117745A2 (en) 2007-10-18
KR20080100474A (ko) 2008-11-18
US7483327B2 (en) 2009-01-27
JP2009528635A (ja) 2009-08-06
TW200739604A (en) 2007-10-16
WO2007117745A3 (en) 2008-05-22
EP1994420A4 (en) 2013-06-05
JP4932856B2 (ja) 2012-05-16
US20070220388A1 (en) 2007-09-20
EP1994420A2 (en) 2008-11-26

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