JP4914573B2 - 高誘電体ゲート絶縁膜及び金属ゲート電極を有する電界効果トランジスタの製造方法 - Google Patents

高誘電体ゲート絶縁膜及び金属ゲート電極を有する電界効果トランジスタの製造方法 Download PDF

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Publication number
JP4914573B2
JP4914573B2 JP2005051340A JP2005051340A JP4914573B2 JP 4914573 B2 JP4914573 B2 JP 4914573B2 JP 2005051340 A JP2005051340 A JP 2005051340A JP 2005051340 A JP2005051340 A JP 2005051340A JP 4914573 B2 JP4914573 B2 JP 4914573B2
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module
metal
film
substrate
field effect
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Japanese (ja)
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JP2006237371A (ja
JP2006237371A5 (https=
Inventor
ウィクラマナヤカ スニル
求 小須田
直樹 山田
尚武 北野
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Canon Anelva Corp
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Canon Anelva Corp
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Priority to US11/347,256 priority patent/US7655549B2/en
Publication of JP2006237371A publication Critical patent/JP2006237371A/ja
Priority to US12/400,012 priority patent/US20090178621A1/en
Publication of JP2006237371A5 publication Critical patent/JP2006237371A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/0134—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/58—After-treatment
    • C23C14/5806—Thermal treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69392—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing hafnium, e.g. HfO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0468—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 

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  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Thermal Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2005051340A 2005-02-25 2005-02-25 高誘電体ゲート絶縁膜及び金属ゲート電極を有する電界効果トランジスタの製造方法 Expired - Fee Related JP4914573B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2005051340A JP4914573B2 (ja) 2005-02-25 2005-02-25 高誘電体ゲート絶縁膜及び金属ゲート電極を有する電界効果トランジスタの製造方法
US11/347,256 US7655549B2 (en) 2005-02-25 2006-02-06 Method for depositing a metal gate on a high-k dielectric film
US12/400,012 US20090178621A1 (en) 2005-02-25 2009-03-09 Substrate treating system for depositing a metal gate on a high-k dielectric film and improving high-k dielectric film and metal gate interface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005051340A JP4914573B2 (ja) 2005-02-25 2005-02-25 高誘電体ゲート絶縁膜及び金属ゲート電極を有する電界効果トランジスタの製造方法

Related Child Applications (3)

Application Number Title Priority Date Filing Date
JP2009040272A Division JP2009124177A (ja) 2009-02-24 2009-02-24 ｈｉｇｈ−Ｋ誘電膜上に金属ゲートを蒸着する方法及び、ｈｉｇｈ−Ｋ誘電膜と金属ゲートとの界面を向上させる方法、並びに、基板処理システム
JP2009268466A Division JP4523994B2 (ja) 2009-11-26 2009-11-26 電界効果トランジスタの製造方法
JP2009268467A Division JP4523995B2 (ja) 2009-11-26 2009-11-26 電界効果トランジスタの製造方法

Publications (3)

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JP2006237371A JP2006237371A (ja) 2006-09-07
JP2006237371A5 JP2006237371A5 (https=) 2009-03-19
JP4914573B2 true JP4914573B2 (ja) 2012-04-11

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US (2) US7655549B2 (https=)
JP (1) JP4914573B2 (https=)

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JP5037242B2 (ja) * 2007-07-06 2012-09-26 キヤノンアネルバ株式会社 半導体素子の製造方法
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US20110042209A1 (en) * 2008-06-25 2011-02-24 Canon Anelva Corporation Sputtering apparatus and recording medium for recording control program thereof
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JP5247619B2 (ja) * 2009-07-28 2013-07-24 キヤノンアネルバ株式会社 誘電体膜、誘電体膜を用いた半導体装置の製造方法及び半導体製造装置
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US20230257869A1 (en) * 2020-06-30 2023-08-17 Qorvo Biotechnologies, Llc System for depositing piezoelectric materials, methods for using the same, and materials deposited with the same

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US7655549B2 (en) 2010-02-02
US20090178621A1 (en) 2009-07-16
US20060194396A1 (en) 2006-08-31

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