JP4870557B2 - 接合方法 - Google Patents
接合方法 Download PDFInfo
- Publication number
- JP4870557B2 JP4870557B2 JP2006512095A JP2006512095A JP4870557B2 JP 4870557 B2 JP4870557 B2 JP 4870557B2 JP 2006512095 A JP2006512095 A JP 2006512095A JP 2006512095 A JP2006512095 A JP 2006512095A JP 4870557 B2 JP4870557 B2 JP 4870557B2
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- bonded
- joining
- roughness
- control step
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/20—Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
- B23K1/203—Fluxing, i.e. applying flux onto surfaces
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0373—Conductors having a fine structure, e.g. providing a plurality of contact points with a structured tool
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0307—Providing micro- or nanometer scale roughness on a metal surface, e.g. by plating of nodules or dendrites
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3489—Composition of fluxes; Methods of application thereof; Other methods of activating the contact surfaces
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/383—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by microetching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/974—Substrate surface preparation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
- Y10T156/1002—Methods of surface bonding and/or assembly therefor with permanent bending or reshaping or surface deformation of self sustaining lamina
- Y10T156/1007—Running or continuous length work
- Y10T156/1023—Surface deformation only [e.g., embossing]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/14—Surface bonding means and/or assembly means with shaping, scarifying, or cleaning joining surface only
Description
○接合箇所間の寸法:bp(凹凸プレート3に形成された凹凸のピーク間隔であり、設計により決定される寸法)
○接合箇所における接合面積:s(接合箇所Eの形状、寸法、押し込み量によって決定される理論値)
○単位面積当りの接合面積:Sc
○接合物の被接合面積:S(実測可能な値)
○総接合面積:So、とすると、
単位面積1とEを4頂点とする1辺長さbpの正方形の面積(bp)2との比は、単位面積当りの接合面積Scと接合面積s(1頂点当りの接合面積s/4の4頂点分として、4×s/4)との比に等しくなり、下式(1)が成り立つ。
ここで、接合物の被接合面積:Sとは、接合箇所Eにおける正味の有効接合面積sとは異なり、図5(c)に示すように、有効接合部と非接合部とを含み、外見上は接合部と認識される実測上の投影総面積を意味する。
So=S×Sc…(3)
So=S×s/(bp)2…(4)
上記総接合面積Soと接合強度との相関関係を把握しておけば、所定の接合強度を得るために必要な総接合面積Soを求めることができるので、式(4)から総接合面積Soを得るために必要な接合面積s、あるいは接合箇所間の寸法bpを決定すればよい。そのとき、接合面積sは、凹凸プレート3に形成された粗面部3aの1接合箇所の形状や寸法、押し込み量等の数値を選択することにより決定することができる。
2.電子部品1の接合部であるAu表面を、Si基板をエッチング加工して作成した型で規則的な凹凸をつけてる粗面化工程を表面粗さ加工制御工程として実施
(傾斜角54.7°、異方性エッチング1.7μm高さ、ピッチ3μm)
3.粗面化された電子部品1上のAuバンプと、電子部品2上のAuスパッタ電極をUVランプにて同時に表面処理し、接合阻害物質の除去、接合有効物質の付着を図る
(低圧水銀ランプ 波長185〜254nm、照度20mW/cm2、照射時間90s)
4.接合面温度100℃になるよう、電子部品1、電子部品2の両方、もしくは一方を加熱し、下圧することにより、凝着またはおよび拡散接合を起こし、接合させる
以上の工程によって、Au−Au接合強度としては、接合面積φ50μm(1963μm2)にて、均一な剪断破壊強度200mNを得た。また、初期洗浄工程として、Arプラズマ洗浄(200W、30s)を行うと、より接合強度が上昇し、同接合においてせん断破壊強度が300mN以上となった。ただし、この場合、せん断破壊部位が接合界面以外で発生したため、接合強度の定量化はできていないが、接合強度を保証する上では十分な隔靴をえることができた。
Claims (8)
- 複数の被接合物の接合面に表面処理をした後、複数の被接合物をそれぞれの接合面間で接合する接合方法であって、
複数の被接合物の接合する少なくとも一方の接合面を所定粗さにする表面粗さ制御工程と、前記被接合物の接合面に紫外線を照射し前記被加工物の接合面の酸化物や有機物を除去して前記被加工物の接合面の表面状態を改質する表面処理工程と、前記複数の被接合物のそれぞれの接合面を当接させて接合する接合工程と、
前記表面粗さ制御工程の前に、前記被接合物の接合面を洗浄する初期表面洗浄工程とを含み、
前記表面処理工程と前記表面粗さ制御工程と前記接合工程と前記初期表面洗浄工程とを大気圧雰囲気中で実施する接合方法。 - 複数の被接合物の接合面に表面処理をした後、複数の被接合物をそれぞれの接合面間で接合する接合方法であって、
複数の被接合物の接合する少なくとも一方の接合面を所定粗さにする表面粗さ制御工程と、前記被接合物の接合面に大気圧プラズマによる生成物を照射し前記被加工物の接合面の酸化物や有機物を除去して前記被加工物の接合面の表面状態を改質する表面処理工程と、前記複数の被接合物のそれぞれの接合面を当接させて接合する接合工程と、
前記表面粗さ制御工程の前に、前記被接合物の接合面を洗浄する初期表面洗浄工程とを有し、
前記表面処理工程と前記表面粗さ制御工程と前記接合工程と前記初期表面洗浄工程とを大気圧雰囲気中で実施する接合方法。 - 前記表面粗さ制御工程は、所定の表面粗さに加工する請求項1または2のいずれかの請求項に記載の接合方法。
- 前記表面粗さ制御工程は、所定粗さの凹凸が形成された凹凸形成部材により、前記接合する少なくとも一方の接合面に前記凹凸形成を転写する請求項3に記載の接合方法。
- 前記表面粗さ制御工程は、大気圧プラズマ処理である請求項3に記載の接合方法。
- 前記表面粗さ制御工程は、微細粒子を吹き付けるブラスト処理である請求項3に記載の接合方法。
- 前記表面処理工程は、前記接合工程と並行して実施する請求項1から請求項6に記載の接合方法。
- 前記接合工程は、室温雰囲気下で実施する請求項1から請求項7に記載の接合方法。
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JP2006512095A JP4870557B2 (ja) | 2004-04-08 | 2005-04-06 | 接合方法 |
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PCT/JP2005/006740 WO2005097396A1 (ja) | 2004-04-08 | 2005-04-06 | 接合方法及びその装置 |
JP2006512095A JP4870557B2 (ja) | 2004-04-08 | 2005-04-06 | 接合方法 |
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JP (1) | JP4870557B2 (ja) |
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US8240539B2 (en) * | 2004-05-28 | 2012-08-14 | Panasonic Corporation | Joining apparatus with UV cleaning |
JP4969118B2 (ja) * | 2006-03-15 | 2012-07-04 | 三菱重工業株式会社 | 成形体の前処理方法、接着物品及びその製造方法、並びに塗装物品及びその製造方法 |
JP4162094B2 (ja) | 2006-05-30 | 2008-10-08 | 三菱重工業株式会社 | 常温接合によるデバイス、デバイス製造方法ならびに常温接合装置 |
JP4172806B2 (ja) | 2006-09-06 | 2008-10-29 | 三菱重工業株式会社 | 常温接合方法及び常温接合装置 |
JP4793461B2 (ja) * | 2009-03-11 | 2011-10-12 | 株式会社デンソー | 荷重検出装置の製造方法 |
JP5493399B2 (ja) * | 2009-03-12 | 2014-05-14 | 株式会社ニコン | 製造装置、及び、半導体装置の製造方法 |
KR101197987B1 (ko) * | 2010-08-18 | 2012-11-05 | 삼성전기주식회사 | 주석 합금 형성용 도금액 및 이를 이용한 주석 합금 피막의 형성방법 |
JP6011074B2 (ja) | 2012-01-20 | 2016-10-19 | 富士通株式会社 | 電子装置の製造方法及び電子装置の製造装置 |
CN102896385B (zh) * | 2012-09-10 | 2015-07-08 | 宁波五谷金属制品有限公司 | 钎焊工艺 |
JP6100503B2 (ja) * | 2012-11-01 | 2017-03-22 | 日本電信電話株式会社 | 実装方法 |
JP6496100B2 (ja) * | 2013-03-21 | 2019-04-03 | 新電元工業株式会社 | 半導体装置の製造方法 |
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JP5948533B2 (ja) * | 2014-06-19 | 2016-07-06 | 株式会社ムサシノエンジニアリング | 原子拡散接合方法 |
CN106583983A (zh) * | 2017-02-20 | 2017-04-26 | 于银强 | 压焊工艺 |
KR20240010753A (ko) * | 2017-03-02 | 2024-01-24 | 에베 그룹 에. 탈너 게엠베하 | 칩들을 본딩하기 위한 방법 및 디바이스 |
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WO2023152961A1 (ja) * | 2022-02-14 | 2023-08-17 | 富士通株式会社 | 電子装置及び電子装置の製造方法 |
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