JP4869464B2 - 半導体装置およびその作製方法 - Google Patents

半導体装置およびその作製方法 Download PDF

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Publication number
JP4869464B2
JP4869464B2 JP36829699A JP36829699A JP4869464B2 JP 4869464 B2 JP4869464 B2 JP 4869464B2 JP 36829699 A JP36829699 A JP 36829699A JP 36829699 A JP36829699 A JP 36829699A JP 4869464 B2 JP4869464 B2 JP 4869464B2
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Japan
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region
conductivity type
impurity region
semiconductor layer
island
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Expired - Fee Related
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JP36829699A
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English (en)
Japanese (ja)
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JP2000243975A (ja
JP2000243975A5 (enExample
Inventor
舜平 山崎
潤 小山
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP36829699A priority Critical patent/JP4869464B2/ja
Publication of JP2000243975A publication Critical patent/JP2000243975A/ja
Publication of JP2000243975A5 publication Critical patent/JP2000243975A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

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  • Liquid Crystal (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP36829699A 1998-12-25 1999-12-24 半導体装置およびその作製方法 Expired - Fee Related JP4869464B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP36829699A JP4869464B2 (ja) 1998-12-25 1999-12-24 半導体装置およびその作製方法

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP37120398 1998-12-25
JP10-371203 1998-12-25
JP1998371203 1998-12-25
JP36829699A JP4869464B2 (ja) 1998-12-25 1999-12-24 半導体装置およびその作製方法

Publications (3)

Publication Number Publication Date
JP2000243975A JP2000243975A (ja) 2000-09-08
JP2000243975A5 JP2000243975A5 (enExample) 2007-08-23
JP4869464B2 true JP4869464B2 (ja) 2012-02-08

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Family Applications (1)

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JP36829699A Expired - Fee Related JP4869464B2 (ja) 1998-12-25 1999-12-24 半導体装置およびその作製方法

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JP (1) JP4869464B2 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7235810B1 (en) 1998-12-03 2007-06-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating the same
US7525165B2 (en) * 2000-04-17 2009-04-28 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and manufacturing method thereof
JP5046451B2 (ja) * 2000-09-22 2012-10-10 株式会社半導体エネルギー研究所 半導体表示装置の作製方法
US6562671B2 (en) 2000-09-22 2003-05-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor display device and manufacturing method thereof
US6509616B2 (en) * 2000-09-29 2003-01-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and its manufacturing method
JP5046452B2 (ja) 2000-10-26 2012-10-10 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4954366B2 (ja) 2000-11-28 2012-06-13 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4097521B2 (ja) 2002-12-27 2008-06-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4641741B2 (ja) * 2004-05-28 2011-03-02 三菱電機株式会社 半導体装置
KR20070049742A (ko) * 2005-11-09 2007-05-14 엘지.필립스 엘시디 주식회사 액정표시장치용 어레이기판과 그 제조방법
KR101458898B1 (ko) 2008-02-12 2014-11-07 삼성디스플레이 주식회사 표시 장치 및 그 제조 방법
KR101727469B1 (ko) 2009-11-06 2017-04-17 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06260499A (ja) * 1993-03-02 1994-09-16 Casio Comput Co Ltd 薄膜トランジスタおよびその製造方法
US6808965B1 (en) * 1993-07-26 2004-10-26 Seiko Epson Corporation Methodology for fabricating a thin film transistor, including an LDD region, from amorphous semiconductor film deposited at 530° C. or less using low pressure chemical vapor deposition
JP3326013B2 (ja) * 1994-07-14 2002-09-17 株式会社半導体エネルギー研究所 半導体装置の作製方法

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JP2000243975A (ja) 2000-09-08

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