JP4825911B2 - 介在チャンバでの脱フッ素化及びウェハ脱フッ素化ステップによるプラズマエッチング及びフォトレジストストリッププロセス - Google Patents
介在チャンバでの脱フッ素化及びウェハ脱フッ素化ステップによるプラズマエッチング及びフォトレジストストリッププロセス Download PDFInfo
- Publication number
- JP4825911B2 JP4825911B2 JP2009501524A JP2009501524A JP4825911B2 JP 4825911 B2 JP4825911 B2 JP 4825911B2 JP 2009501524 A JP2009501524 A JP 2009501524A JP 2009501524 A JP2009501524 A JP 2009501524A JP 4825911 B2 JP4825911 B2 JP 4825911B2
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- Prior art keywords
- chamber
- plasma
- workpiece
- coupling
- photoresist mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02046—Dry cleaning only
- H01L21/02049—Dry cleaning only with gaseous HF
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/388,363 US7244313B1 (en) | 2006-03-24 | 2006-03-24 | Plasma etch and photoresist strip process with intervening chamber de-fluorination and wafer de-fluorination steps |
| US11/388,363 | 2006-03-24 | ||
| PCT/US2007/006955 WO2007111893A2 (en) | 2006-03-24 | 2007-03-19 | Plasma etch and photoresist strip process with intervening chamber de-fluorination and wafer de-fluorination steps |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009530861A JP2009530861A (ja) | 2009-08-27 |
| JP2009530861A5 JP2009530861A5 (enExample) | 2011-08-11 |
| JP4825911B2 true JP4825911B2 (ja) | 2011-11-30 |
Family
ID=38235554
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009501524A Expired - Fee Related JP4825911B2 (ja) | 2006-03-24 | 2007-03-19 | 介在チャンバでの脱フッ素化及びウェハ脱フッ素化ステップによるプラズマエッチング及びフォトレジストストリッププロセス |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7244313B1 (enExample) |
| EP (1) | EP1999784A4 (enExample) |
| JP (1) | JP4825911B2 (enExample) |
| KR (1) | KR101032831B1 (enExample) |
| CN (1) | CN101448580B (enExample) |
| WO (1) | WO2007111893A2 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7510976B2 (en) * | 2006-04-21 | 2009-03-31 | Applied Materials, Inc. | Dielectric plasma etch process with in-situ amorphous carbon mask with improved critical dimension and etch selectivity |
| CN102097360B (zh) * | 2009-12-10 | 2016-08-03 | 中芯国际集成电路制造(上海)有限公司 | 刻蚀连接孔的方法 |
| CN102125921B (zh) * | 2010-01-20 | 2012-09-05 | 常州瑞择微电子科技有限公司 | 一种光掩模在清洗过程中的传输方法 |
| JP5600447B2 (ja) * | 2010-03-05 | 2014-10-01 | 株式会社日立ハイテクノロジーズ | プラズマエッチング方法 |
| US9318341B2 (en) | 2010-12-20 | 2016-04-19 | Applied Materials, Inc. | Methods for etching a substrate |
| US9190316B2 (en) * | 2011-10-26 | 2015-11-17 | Globalfoundries U.S. 2 Llc | Low energy etch process for nitrogen-containing dielectric layer |
| CN104882389B (zh) * | 2014-02-28 | 2017-12-26 | 无锡华润上华科技有限公司 | 一种半导体器件量测方法 |
| CN105152795B (zh) * | 2015-10-23 | 2018-11-06 | 武汉工程大学 | 共混改性二氧化硅乳液包膜磷酸二铵缓释复合肥及其制备方法 |
| CN106356415B (zh) * | 2016-12-02 | 2018-06-29 | 武汉新芯集成电路制造有限公司 | 背面金属格栅的制作方法 |
| US12110589B2 (en) | 2017-08-01 | 2024-10-08 | Applied Materials, Inc. | Methods for metal oxide post-treatment |
| US10872761B2 (en) * | 2018-06-25 | 2020-12-22 | Mattson Technology Inc. | Post etch defluorination process |
| CN113031409B (zh) * | 2021-03-03 | 2024-12-31 | 苏州子山半导体科技有限公司 | 一种氧化钒热成像芯片制造中的聚酰亚胺光刻胶去除方法 |
| KR20250164230A (ko) * | 2023-03-24 | 2025-11-24 | 도쿄엘렉트론가부시키가이샤 | 플라즈마 처리 방법 및 플라즈마 처리 장치 |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003059911A (ja) * | 2001-08-21 | 2003-02-28 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
| JP2003100718A (ja) * | 2001-09-26 | 2003-04-04 | Tokyo Electron Ltd | エッチング方法 |
| JP2003264170A (ja) * | 2002-01-07 | 2003-09-19 | Tokyo Electron Ltd | プラズマ処理方法 |
| JP2004071774A (ja) * | 2002-08-05 | 2004-03-04 | Tokyo Electron Ltd | マルチチャンバシステムを用いたプラズマ処理方法 |
| JP2006049908A (ja) * | 2004-08-03 | 2006-02-16 | Samsung Electronics Co Ltd | 塩基性物質拡散障壁膜を使用する微細電子素子のデュアルダマシン配線の製造方法 |
| JP2007511099A (ja) * | 2003-11-12 | 2007-04-26 | ラム リサーチ コーポレーション | フォトレジストストリッピングの間のバリヤー物質損失の最小化 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6051505A (en) | 1998-03-05 | 2000-04-18 | Taiwan Semiconductor Manufacturing Company | Plasma etch method for forming metal-fluoropolymer residue free vias through silicon containing dielectric layers |
| US6548230B1 (en) * | 1998-09-18 | 2003-04-15 | Taiwan Semiconductor Manufacturing Co., Ltd | Method for in-situ removal of photoresist and sidewall polymer |
| US6468599B1 (en) * | 1998-12-25 | 2002-10-22 | International Business Machines Corporation | Method for removing organic compound by ultraviolet radiation |
| US6528751B1 (en) | 2000-03-17 | 2003-03-04 | Applied Materials, Inc. | Plasma reactor with overhead RF electrode tuned to the plasma |
| US6440864B1 (en) * | 2000-06-30 | 2002-08-27 | Applied Materials Inc. | Substrate cleaning process |
| US6806038B2 (en) * | 2002-07-08 | 2004-10-19 | Lsi Logic Corporation | Plasma passivation |
| US7638440B2 (en) | 2004-03-12 | 2009-12-29 | Applied Materials, Inc. | Method of depositing an amorphous carbon film for etch hardmask application |
| US8349128B2 (en) * | 2004-06-30 | 2013-01-08 | Applied Materials, Inc. | Method and apparatus for stable plasma processing |
| KR100704470B1 (ko) | 2004-07-29 | 2007-04-10 | 주식회사 하이닉스반도체 | 비결정성 탄소막을 희생 하드마스크로 이용하는반도체소자 제조 방법 |
| US7288488B2 (en) * | 2005-05-10 | 2007-10-30 | Lam Research Corporation | Method for resist strip in presence of regular low k and/or porous low k dielectric materials |
| US8404594B2 (en) | 2005-05-27 | 2013-03-26 | Freescale Semiconductor, Inc. | Reverse ALD |
-
2006
- 2006-03-24 US US11/388,363 patent/US7244313B1/en not_active Expired - Fee Related
-
2007
- 2007-03-19 KR KR1020087025919A patent/KR101032831B1/ko not_active Expired - Fee Related
- 2007-03-19 CN CN2007800102874A patent/CN101448580B/zh not_active Expired - Fee Related
- 2007-03-19 JP JP2009501524A patent/JP4825911B2/ja not_active Expired - Fee Related
- 2007-03-19 EP EP07753572A patent/EP1999784A4/en not_active Withdrawn
- 2007-03-19 WO PCT/US2007/006955 patent/WO2007111893A2/en not_active Ceased
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003059911A (ja) * | 2001-08-21 | 2003-02-28 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
| JP2003100718A (ja) * | 2001-09-26 | 2003-04-04 | Tokyo Electron Ltd | エッチング方法 |
| JP2003264170A (ja) * | 2002-01-07 | 2003-09-19 | Tokyo Electron Ltd | プラズマ処理方法 |
| JP2004071774A (ja) * | 2002-08-05 | 2004-03-04 | Tokyo Electron Ltd | マルチチャンバシステムを用いたプラズマ処理方法 |
| JP2007511099A (ja) * | 2003-11-12 | 2007-04-26 | ラム リサーチ コーポレーション | フォトレジストストリッピングの間のバリヤー物質損失の最小化 |
| JP2006049908A (ja) * | 2004-08-03 | 2006-02-16 | Samsung Electronics Co Ltd | 塩基性物質拡散障壁膜を使用する微細電子素子のデュアルダマシン配線の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101448580A (zh) | 2009-06-03 |
| WO2007111893A3 (en) | 2009-01-08 |
| KR101032831B1 (ko) | 2011-05-06 |
| EP1999784A4 (en) | 2010-05-19 |
| KR20090026253A (ko) | 2009-03-12 |
| JP2009530861A (ja) | 2009-08-27 |
| EP1999784A2 (en) | 2008-12-10 |
| CN101448580B (zh) | 2011-02-23 |
| WO2007111893A2 (en) | 2007-10-04 |
| US7244313B1 (en) | 2007-07-17 |
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