JP4820586B2 - 半導体集積回路装置 - Google Patents

半導体集積回路装置 Download PDF

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Publication number
JP4820586B2
JP4820586B2 JP2005189102A JP2005189102A JP4820586B2 JP 4820586 B2 JP4820586 B2 JP 4820586B2 JP 2005189102 A JP2005189102 A JP 2005189102A JP 2005189102 A JP2005189102 A JP 2005189102A JP 4820586 B2 JP4820586 B2 JP 4820586B2
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Japan
Prior art keywords
semiconductor integrated
level
integrated circuit
circuit device
data
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JP2005189102A
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English (en)
Japanese (ja)
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JP2007013349A5 (enExample
JP2007013349A (ja
Inventor
雅文 小野内
雄介 菅野
弘之 水野
靖久 島崎
哲也 山田
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Renesas Electronics Corp
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Renesas Electronics Corp
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Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2005189102A priority Critical patent/JP4820586B2/ja
Priority to US11/476,040 priority patent/US7443218B2/en
Priority to KR1020060059564A priority patent/KR101184182B1/ko
Publication of JP2007013349A publication Critical patent/JP2007013349A/ja
Publication of JP2007013349A5 publication Critical patent/JP2007013349A5/ja
Application granted granted Critical
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/017—Adjustment of width or dutycycle of pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
JP2005189102A 2005-06-29 2005-06-29 半導体集積回路装置 Expired - Fee Related JP4820586B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2005189102A JP4820586B2 (ja) 2005-06-29 2005-06-29 半導体集積回路装置
US11/476,040 US7443218B2 (en) 2005-06-29 2006-06-28 Semiconductor integrated circuit with pulsed clock data latch
KR1020060059564A KR101184182B1 (ko) 2005-06-29 2006-06-29 반도체 집적회로 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005189102A JP4820586B2 (ja) 2005-06-29 2005-06-29 半導体集積回路装置

Publications (3)

Publication Number Publication Date
JP2007013349A JP2007013349A (ja) 2007-01-18
JP2007013349A5 JP2007013349A5 (enExample) 2008-05-01
JP4820586B2 true JP4820586B2 (ja) 2011-11-24

Family

ID=37588699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005189102A Expired - Fee Related JP4820586B2 (ja) 2005-06-29 2005-06-29 半導体集積回路装置

Country Status (3)

Country Link
US (1) US7443218B2 (enExample)
JP (1) JP4820586B2 (enExample)
KR (1) KR101184182B1 (enExample)

Families Citing this family (25)

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US7694242B1 (en) * 2006-12-11 2010-04-06 Cadence Design Systems, Inc. System and method of replacing flip-flops with pulsed latches in circuit designs
JP5211310B2 (ja) * 2007-03-07 2013-06-12 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 半導体集積回路
US7671629B2 (en) * 2008-04-08 2010-03-02 Freescale Semiconductor, Inc. Single-supply, single-ended level conversion circuit for an integrated circuit having multiple power supply domains
JP2010273322A (ja) * 2009-04-23 2010-12-02 Nec Engineering Ltd 多数決回路付きフリップフロップ回路
US8120406B2 (en) * 2009-07-06 2012-02-21 Ati Technologies Ulc Sequential circuit with dynamic pulse width control
FR2963687A1 (fr) * 2010-08-06 2012-02-10 Dolphin Integration Sa Arbre d'horloge pour bascules commandees par impulsions
US8432195B2 (en) * 2010-11-05 2013-04-30 Qualcomm Incorporated Latch circuits with synchronous data loading and self-timed asynchronous data capture
US8487681B2 (en) * 2011-02-23 2013-07-16 Nvidia Corporation Dual-trigger low-energy flip-flop circuit
KR20130087302A (ko) * 2012-01-27 2013-08-06 삼성전자주식회사 반도체 집적 회로와 이를 포함하는 장치의 동작 방법
US9473123B2 (en) 2012-03-16 2016-10-18 Samsung Electronics Co., Ltd. Semiconductor circuit and method of operating the circuit
KR101928271B1 (ko) 2012-03-16 2018-12-13 삼성전자 주식회사 스캔 플립-플롭, 이의 동작 방법, 및 이를 포함하는 데이터 처리 장치들
US9473117B2 (en) * 2015-02-13 2016-10-18 Samsung Electronics Co., Ltd. Multi-bit flip-flops and scan chain circuits
JP2017130556A (ja) * 2016-01-20 2017-07-27 国立大学法人京都大学 半導体装置及び半導体装置の製造方法
US10248155B2 (en) 2016-01-25 2019-04-02 Samsung Electronics Co., Ltd. Semiconductor device including clock generating circuit and channel management circuit
KR102467172B1 (ko) 2016-01-25 2022-11-14 삼성전자주식회사 반도체 장치
US10296066B2 (en) 2016-01-25 2019-05-21 Samsung Electronics Co., Ltd. Semiconductor device, semiconductor system, and method of operating the semiconductor device
DE102017110821A1 (de) 2016-01-25 2018-07-26 Samsung Electronics Co., Ltd. Halbleitervorrichtung
US10303203B2 (en) 2016-01-25 2019-05-28 Samsung Electronics Co., Ltd. Semiconductor device, semiconductor system and method for operating semiconductor device
KR102462506B1 (ko) 2016-02-05 2022-11-02 삼성전자주식회사 저전력을 위한 클락 게이트된 싱크로나이저를 포함하는 집적 회로와 이를 포함하는 데이터 처리 시스템
US10291211B2 (en) * 2016-09-08 2019-05-14 Qualcomm Incorporated Adaptive pulse generation circuits for clocking pulse latches with minimum hold time
US10211832B1 (en) 2017-12-05 2019-02-19 Micron Technology, Inc. Input buffer circuit
KR102340775B1 (ko) * 2020-03-16 2021-12-21 국방과학연구소 에스-박스의 임계화 구현을 위한 동기화 회로
CN111600607B (zh) * 2020-05-13 2022-04-15 清华大学 一种宽带低功耗比较器电路
US11799458B2 (en) 2021-06-08 2023-10-24 Samsung Electronics Co., Ltd. Flip flop circuit
CN116521248B (zh) * 2023-07-03 2023-12-15 深圳砺驰半导体科技有限公司 芯片唤醒电路、芯片唤醒方法、芯片、部件及电子设备

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Publication number Priority date Publication date Assignee Title
JPS607224A (ja) * 1983-06-27 1985-01-16 Toshiba Corp デ−タラツチ回路
JPS6214523A (ja) * 1985-07-12 1987-01-23 Toshiba Corp 排他的論理和回路
JPH08274594A (ja) * 1995-03-28 1996-10-18 Nippon Telegr & Teleph Corp <Ntt> フリップフロップ回路
JPH10163820A (ja) * 1996-12-05 1998-06-19 Kawasaki Steel Corp 半導体装置
US5861762A (en) * 1997-03-07 1999-01-19 Sun Microsystems, Inc. Inverse toggle XOR and XNOR circuit
JP3339562B2 (ja) * 1998-05-22 2002-10-28 日本電気株式会社 フリップフロップ回路
JP2000013195A (ja) * 1998-06-24 2000-01-14 Nec Corp 低消費電力回路及びこれを含む集積回路
JP3580736B2 (ja) * 1998-08-26 2004-10-27 株式会社東芝 クロック信号制御機能付フリップフロップ回路、及び、クロック制御回路
TW419825B (en) * 1998-08-26 2001-01-21 Toshiba Corp Flip-flop circuit with clock signal control function and clock control signal
JP2000165208A (ja) * 1998-11-27 2000-06-16 Kawasaki Steel Corp フリップフロップ
JP2001185999A (ja) * 1999-12-22 2001-07-06 Sony Corp 差動型センスアンプ回路およびそれを用いた動的論理回路
JP2001308686A (ja) * 2000-04-24 2001-11-02 Fujitsu Ltd フリップフロップ
JP2002300010A (ja) * 2001-03-29 2002-10-11 Toshiba Corp 半導体記憶保持装置
US6456116B1 (en) * 2001-04-11 2002-09-24 Hewlett-Packard Company Dynamic comparator circuit
US6822478B2 (en) * 2001-07-03 2004-11-23 Texas Instruments Incorporated Data-driven clock gating for a sequential data-capture device
US6734707B2 (en) * 2002-01-11 2004-05-11 Samsung Electronics Co., Ltd. Data input circuit for reducing loading difference between fetch signal and multiple data in semiconductor device
JP4095367B2 (ja) * 2002-07-23 2008-06-04 株式会社東芝 半導体集積回路装置
JP2004246525A (ja) * 2003-02-13 2004-09-02 Matsushita Electric Ind Co Ltd 順序回路、記憶素子、クロック発生回路およびクロック制御方法、ならびに回路変更方法および回路設計支援装置、半導体集積回路およびそれを備えた電子装置、ならびに電子制御装置およびそれを備えた移動体

Also Published As

Publication number Publication date
KR20070001843A (ko) 2007-01-04
US7443218B2 (en) 2008-10-28
KR101184182B1 (ko) 2012-09-18
US20070001734A1 (en) 2007-01-04
JP2007013349A (ja) 2007-01-18

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