JP4801249B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP4801249B2
JP4801249B2 JP2000347343A JP2000347343A JP4801249B2 JP 4801249 B2 JP4801249 B2 JP 4801249B2 JP 2000347343 A JP2000347343 A JP 2000347343A JP 2000347343 A JP2000347343 A JP 2000347343A JP 4801249 B2 JP4801249 B2 JP 4801249B2
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Japan
Prior art keywords
film
tft
region
impurity
layer
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP2000347343A
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English (en)
Japanese (ja)
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JP2001210832A5 (enExample
JP2001210832A (ja
Inventor
幸治 小野
英臣 須沢
達也 荒尾
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2000347343A priority Critical patent/JP4801249B2/ja
Publication of JP2001210832A publication Critical patent/JP2001210832A/ja
Publication of JP2001210832A5 publication Critical patent/JP2001210832A5/ja
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Publication of JP4801249B2 publication Critical patent/JP4801249B2/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

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  • Liquid Crystal (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
JP2000347343A 1999-11-19 2000-11-14 半導体装置の作製方法 Expired - Fee Related JP4801249B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000347343A JP4801249B2 (ja) 1999-11-19 2000-11-14 半導体装置の作製方法

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP33017499 1999-11-19
JP1999330174 1999-11-19
JP11-330174 1999-11-19
JP2000347343A JP4801249B2 (ja) 1999-11-19 2000-11-14 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2001210832A JP2001210832A (ja) 2001-08-03
JP2001210832A5 JP2001210832A5 (enExample) 2007-12-27
JP4801249B2 true JP4801249B2 (ja) 2011-10-26

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ID=26573434

Family Applications (1)

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JP2000347343A Expired - Fee Related JP4801249B2 (ja) 1999-11-19 2000-11-14 半導体装置の作製方法

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JP (1) JP4801249B2 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW495854B (en) 2000-03-06 2002-07-21 Semiconductor Energy Lab Semiconductor device and manufacturing method thereof
TW513753B (en) 2000-03-27 2002-12-11 Semiconductor Energy Lab Semiconductor display device and manufacturing method thereof
JP5046452B2 (ja) 2000-10-26 2012-10-10 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4954366B2 (ja) 2000-11-28 2012-06-13 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2004031409A (ja) * 2002-06-21 2004-01-29 Sanyo Electric Co Ltd 薄膜トランジスタの製造方法
US7508034B2 (en) 2002-09-25 2009-03-24 Sharp Kabushiki Kaisha Single-crystal silicon substrate, SOI substrate, semiconductor device, display device, and manufacturing method of semiconductor device
JP4872197B2 (ja) * 2004-08-25 2012-02-08 カシオ計算機株式会社 薄膜トランジスタパネル及びその製造方法
KR100659758B1 (ko) 2004-09-22 2006-12-19 삼성에스디아이 주식회사 박막트랜지스터 제조 방법
JP2007258453A (ja) * 2006-03-23 2007-10-04 Toshiba Matsushita Display Technology Co Ltd 薄膜トランジスタ、及びその製造方法
JP2013054359A (ja) * 2012-09-18 2013-03-21 Semiconductor Energy Lab Co Ltd 表示装置
US10338446B2 (en) * 2014-12-16 2019-07-02 Sharp Kabushiki Kaisha Semiconductor device having low resistance source and drain regions

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2719252B2 (ja) * 1991-08-26 1998-02-25 シャープ株式会社 薄膜トランジスタ
JP3474604B2 (ja) * 1993-05-25 2003-12-08 三菱電機株式会社 薄膜トランジスタおよびその製法
JP3871736B2 (ja) * 1996-06-25 2007-01-24 株式会社半導体エネルギー研究所 液晶表示装置及び撮影装置及び情報処理装置
JPH10125928A (ja) * 1996-10-23 1998-05-15 Semiconductor Energy Lab Co Ltd 半導体集積回路及びその作製方法
JP3883706B2 (ja) * 1998-07-31 2007-02-21 シャープ株式会社 エッチング方法、及び薄膜トランジスタマトリックス基板の製造方法

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JP2001210832A (ja) 2001-08-03

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