JP4801241B2 - 半導体装置およびその作製方法 - Google Patents

半導体装置およびその作製方法 Download PDF

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Publication number
JP4801241B2
JP4801241B2 JP2000221386A JP2000221386A JP4801241B2 JP 4801241 B2 JP4801241 B2 JP 4801241B2 JP 2000221386 A JP2000221386 A JP 2000221386A JP 2000221386 A JP2000221386 A JP 2000221386A JP 4801241 B2 JP4801241 B2 JP 4801241B2
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JP
Japan
Prior art keywords
region
insulating film
gate electrode
tapered portion
film
Prior art date
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Expired - Fee Related
Application number
JP2000221386A
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English (en)
Japanese (ja)
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JP2001111060A (ja
JP2001111060A5 (enExample
Inventor
舜平 山崎
英臣 須沢
幸治 小野
康行 荒井
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2000221386A priority Critical patent/JP4801241B2/ja
Publication of JP2001111060A publication Critical patent/JP2001111060A/ja
Publication of JP2001111060A5 publication Critical patent/JP2001111060A5/ja
Application granted granted Critical
Publication of JP4801241B2 publication Critical patent/JP4801241B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Landscapes

  • Liquid Crystal (AREA)
  • Recrystallisation Techniques (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2000221386A 1999-07-22 2000-07-21 半導体装置およびその作製方法 Expired - Fee Related JP4801241B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000221386A JP4801241B2 (ja) 1999-07-22 2000-07-21 半導体装置およびその作製方法

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP1999206938 1999-07-22
JP11-206938 1999-07-22
JP20693899 1999-07-22
JP2000221386A JP4801241B2 (ja) 1999-07-22 2000-07-21 半導体装置およびその作製方法

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP2010237285A Division JP4801790B2 (ja) 1999-07-22 2010-10-22 半導体装置
JP2011077995A Division JP5292434B2 (ja) 1999-07-22 2011-03-31 半導体装置

Publications (3)

Publication Number Publication Date
JP2001111060A JP2001111060A (ja) 2001-04-20
JP2001111060A5 JP2001111060A5 (enExample) 2007-09-20
JP4801241B2 true JP4801241B2 (ja) 2011-10-26

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000221386A Expired - Fee Related JP4801241B2 (ja) 1999-07-22 2000-07-21 半導体装置およびその作製方法

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JP (1) JP4801241B2 (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5046452B2 (ja) 2000-10-26 2012-10-10 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4954366B2 (ja) 2000-11-28 2012-06-13 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2003045874A (ja) * 2001-07-27 2003-02-14 Semiconductor Energy Lab Co Ltd 金属配線およびその作製方法、並びに金属配線基板およびその作製方法
US6876350B2 (en) * 2001-08-10 2005-04-05 Semiconductor Energy Laboratory Co., Ltd. Display device and electronic equipment using the same
US6773944B2 (en) 2001-11-07 2004-08-10 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
KR100504537B1 (ko) * 2002-04-17 2005-08-01 엘지.필립스 엘시디 주식회사 박막 트랜지스터의 제조 방법
JP4689155B2 (ja) * 2002-08-29 2011-05-25 株式会社半導体エネルギー研究所 半導体装置の作製方法
US8125601B2 (en) * 2003-01-08 2012-02-28 Samsung Electronics Co., Ltd. Upper substrate and liquid crystal display device having the same
KR100675636B1 (ko) * 2004-05-31 2007-02-02 엘지.필립스 엘시디 주식회사 Ｇｏｌｄｄ구조 및 ｌｄｄ구조의 ｔｆｔ를 동시에포함하는 구동회로부 일체형 액정표시장치
US8878177B2 (en) * 2011-11-11 2014-11-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
JP5906132B2 (ja) * 2012-05-09 2016-04-20 株式会社ジャパンディスプレイ 表示装置
CN106469750A (zh) * 2015-08-19 2017-03-01 昆山工研院新型平板显示技术中心有限公司 薄膜晶体管及其制造方法
JP2016054306A (ja) * 2015-11-13 2016-04-14 株式会社半導体エネルギー研究所 表示装置、表示モジュール及び電子機器
JP6139730B2 (ja) * 2016-03-18 2017-05-31 株式会社ジャパンディスプレイ 表示装置及びその製造方法
JP6553114B2 (ja) * 2017-04-10 2019-07-31 株式会社半導体エネルギー研究所 半導体装置、表示モジュール及び電子機器
CN107104108B (zh) * 2017-05-19 2020-08-21 京东方科技集团股份有限公司 一种阵列基板及其制作方法、平板探测器及影像设备
JP2018190996A (ja) * 2018-07-17 2018-11-29 株式会社半導体エネルギー研究所 半導体装置
JP2020074442A (ja) * 2020-01-21 2020-05-14 株式会社半導体エネルギー研究所 半導体装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3883706B2 (ja) * 1998-07-31 2007-02-21 シャープ株式会社 エッチング方法、及び薄膜トランジスタマトリックス基板の製造方法

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JP2001111060A (ja) 2001-04-20

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