JP4780818B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP4780818B2 JP4780818B2 JP2000058560A JP2000058560A JP4780818B2 JP 4780818 B2 JP4780818 B2 JP 4780818B2 JP 2000058560 A JP2000058560 A JP 2000058560A JP 2000058560 A JP2000058560 A JP 2000058560A JP 4780818 B2 JP4780818 B2 JP 4780818B2
- Authority
- JP
- Japan
- Prior art keywords
- metal
- metal film
- silicon substrate
- contact hole
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
- Weting (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000058560A JP4780818B2 (ja) | 2000-03-03 | 2000-03-03 | 半導体装置の製造方法 |
| US09/635,901 US6593217B1 (en) | 2000-03-03 | 2000-08-11 | Method of manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000058560A JP4780818B2 (ja) | 2000-03-03 | 2000-03-03 | 半導体装置の製造方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011129206A Division JP2011176372A (ja) | 2011-06-09 | 2011-06-09 | 半導体装置およびその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001250791A JP2001250791A (ja) | 2001-09-14 |
| JP2001250791A5 JP2001250791A5 (enExample) | 2007-04-26 |
| JP4780818B2 true JP4780818B2 (ja) | 2011-09-28 |
Family
ID=18579141
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000058560A Expired - Fee Related JP4780818B2 (ja) | 2000-03-03 | 2000-03-03 | 半導体装置の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6593217B1 (enExample) |
| JP (1) | JP4780818B2 (enExample) |
Families Citing this family (40)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050124128A1 (en) * | 2003-12-08 | 2005-06-09 | Kim Hag D. | Methods for manufacturing semiconductor device |
| JP4668530B2 (ja) * | 2003-12-15 | 2011-04-13 | シチズンホールディングス株式会社 | 半導体装置の製造方法 |
| JP2005294360A (ja) * | 2004-03-31 | 2005-10-20 | Nec Electronics Corp | 半導体装置の製造方法 |
| US7183780B2 (en) * | 2004-09-17 | 2007-02-27 | International Business Machines Corporation | Electrical open/short contact alignment structure for active region vs. gate region |
| US7317217B2 (en) * | 2004-09-17 | 2008-01-08 | International Business Machines Corporation | Semiconductor scheme for reduced circuit area in a simplified process |
| KR100600380B1 (ko) * | 2004-12-29 | 2006-07-18 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
| JP4515305B2 (ja) * | 2005-03-29 | 2010-07-28 | 富士通セミコンダクター株式会社 | pチャネルMOSトランジスタおよびその製造方法、半導体集積回路装置の製造方法 |
| KR100675294B1 (ko) * | 2005-10-18 | 2007-01-29 | 삼성전자주식회사 | 리세스된 랜딩패드를 갖는 반도체소자 및 그 제조방법 |
| US7648871B2 (en) * | 2005-10-21 | 2010-01-19 | International Business Machines Corporation | Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabricating same |
| JP4936709B2 (ja) * | 2005-11-25 | 2012-05-23 | 東京エレクトロン株式会社 | プラズマエッチング方法および半導体装置の製造方法 |
| US7696019B2 (en) * | 2006-03-09 | 2010-04-13 | Infineon Technologies Ag | Semiconductor devices and methods of manufacturing thereof |
| US8435873B2 (en) * | 2006-06-08 | 2013-05-07 | Texas Instruments Incorporated | Unguarded Schottky barrier diodes with dielectric underetch at silicide interface |
| US20080076246A1 (en) * | 2006-09-25 | 2008-03-27 | Peterson Brennan L | Through contact layer opening silicide and barrier layer formation |
| KR100835521B1 (ko) * | 2006-12-27 | 2008-06-04 | 동부일렉트로닉스 주식회사 | 반도체 소자의 구조 및 그의 제조방법 |
| JP5165954B2 (ja) * | 2007-07-27 | 2013-03-21 | セイコーインスツル株式会社 | 半導体装置 |
| US8299455B2 (en) * | 2007-10-15 | 2012-10-30 | International Business Machines Corporation | Semiconductor structures having improved contact resistance |
| EP2232537B1 (de) | 2008-01-17 | 2014-08-13 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Elektrische kontaktierung von halbleiter-bauelementen mit geringem kontaktwiderstand |
| JP5353093B2 (ja) * | 2008-07-15 | 2013-11-27 | 株式会社デンソー | 半導体装置の製造方法 |
| KR101552938B1 (ko) * | 2009-02-02 | 2015-09-14 | 삼성전자주식회사 | 스트레스 생성층을 갖는 반도체 소자의 제조방법 |
| DE102009031114B4 (de) * | 2009-06-30 | 2011-07-07 | Globalfoundries Dresden Module One LLC & CO. KG, 01109 | Halbleiterelement, das in einem kristallinen Substratmaterial hergestellt ist und ein eingebettetes in-situ n-dotiertes Halbleitermaterial aufweist, und Verfahren zur Herstellung desselben |
| US8193081B2 (en) * | 2009-10-20 | 2012-06-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and system for metal gate formation with wider metal gate fill margin |
| JP4786741B2 (ja) * | 2009-12-28 | 2011-10-05 | 株式会社東芝 | 半導体装置 |
| DE102010029532B4 (de) * | 2010-05-31 | 2012-01-26 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Transistor mit eingebettetem verformungsinduzierenden Material, das in diamantförmigen Aussparungen auf der Grundlage einer Voramorphisierung hergestellt ist |
| KR101728135B1 (ko) * | 2010-06-11 | 2017-04-18 | 삼성전자 주식회사 | 반도체 소자의 제조방법 |
| US8358012B2 (en) * | 2010-08-03 | 2013-01-22 | International Business Machines Corporation | Metal semiconductor alloy structure for low contact resistance |
| CN102468326B (zh) * | 2010-10-29 | 2015-01-07 | 中国科学院微电子研究所 | 接触电极制造方法和半导体器件 |
| KR101812036B1 (ko) * | 2011-01-06 | 2017-12-26 | 삼성전자 주식회사 | 금속 실리사이드층을 포함하는 반도체 소자 및 그 제조 방법 |
| US8415250B2 (en) * | 2011-04-29 | 2013-04-09 | International Business Machines Corporation | Method of forming silicide contacts of different shapes selectively on regions of a semiconductor device |
| KR101873911B1 (ko) * | 2011-06-07 | 2018-07-04 | 삼성전자주식회사 | 콘택 구조체를 포함하는 반도체 소자와 그 제조방법, 및 그것을 포함하는 전자 시스템 |
| US9496270B2 (en) * | 2014-05-30 | 2016-11-15 | Qualcomm Incorporated | High density single-transistor antifuse memory cell |
| US9214396B1 (en) * | 2014-06-03 | 2015-12-15 | Globalfoundries Inc. | Transistor with embedded stress-inducing layers |
| US20150372100A1 (en) * | 2014-06-19 | 2015-12-24 | GlobalFoundries, Inc. | Integrated circuits having improved contacts and methods for fabricating same |
| US9691804B2 (en) * | 2015-04-17 | 2017-06-27 | Taiwan Semiconductor Manufacturing Company Ltd. | Image sensing device and manufacturing method thereof |
| US9887289B2 (en) | 2015-12-14 | 2018-02-06 | International Business Machines Corporation | Method and structure of improving contact resistance for passive and long channel devices |
| US10141438B2 (en) * | 2016-03-07 | 2018-11-27 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor structure and manufacturing method thereof |
| CN111276486B (zh) | 2018-12-07 | 2021-03-12 | 长江存储科技有限责任公司 | 新型3d nand存储器件及其形成方法 |
| KR102554692B1 (ko) * | 2019-02-18 | 2023-07-12 | 양쯔 메모리 테크놀로지스 씨오., 엘티디. | 집적 구조체 및 형성 방법 |
| CN111755403B (zh) * | 2020-07-16 | 2022-09-20 | 福建省晋华集成电路有限公司 | 接触插塞结构、其制作方法及半导体器件的制作方法 |
| US11825661B2 (en) | 2020-09-23 | 2023-11-21 | Taiwan Semiconductor Manufacturing Company Limited | Mobility enhancement by source and drain stress layer of implantation in thin film transistors |
| US20230343820A1 (en) * | 2022-04-21 | 2023-10-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and manufacturing method thereof |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4378628A (en) * | 1981-08-27 | 1983-04-05 | Bell Telephone Laboratories, Incorporated | Cobalt silicide metallization for semiconductor integrated circuits |
| JPS60187060A (ja) | 1984-03-06 | 1985-09-24 | Seiko Epson Corp | 半導体装置 |
| JPS61181125A (ja) * | 1985-02-06 | 1986-08-13 | Nec Corp | 半導体装置のオ−ミツク電極及びその製造方法 |
| JPH0291934A (ja) * | 1988-09-29 | 1990-03-30 | Toshiba Corp | 半導体装置及びその製造方法 |
| JPH03280532A (ja) | 1990-03-29 | 1991-12-11 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
| JP3104193B2 (ja) | 1991-06-28 | 2000-10-30 | ソニー株式会社 | 半導体装置の接続構造形成方法 |
| JP3208599B2 (ja) * | 1992-05-28 | 2001-09-17 | ソニー株式会社 | 接続孔埋め込み形成方法 |
| JPH06188385A (ja) * | 1992-10-22 | 1994-07-08 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP3280532B2 (ja) | 1995-02-23 | 2002-05-13 | 松下電工株式会社 | 扉鎖錠部材 |
| US5605865A (en) * | 1995-04-03 | 1997-02-25 | Motorola Inc. | Method for forming self-aligned silicide in a semiconductor device using vapor phase reaction |
| US6147405A (en) * | 1998-02-19 | 2000-11-14 | Micron Technology, Inc. | Asymmetric, double-sided self-aligned silicide and method of forming the same |
| JPH11283935A (ja) * | 1998-03-30 | 1999-10-15 | Nec Corp | 半導体装置の製造方法 |
| US6320261B1 (en) * | 1998-04-21 | 2001-11-20 | Micron Technology, Inc. | High aspect ratio metallization structures for shallow junction devices, and methods of forming the same |
-
2000
- 2000-03-03 JP JP2000058560A patent/JP4780818B2/ja not_active Expired - Fee Related
- 2000-08-11 US US09/635,901 patent/US6593217B1/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2001250791A (ja) | 2001-09-14 |
| US6593217B1 (en) | 2003-07-15 |
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