JP4777335B2 - 複合スペーサ絶縁領域幅を備えた集積回路の製造方法 - Google Patents

複合スペーサ絶縁領域幅を備えた集積回路の製造方法 Download PDF

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JP4777335B2
JP4777335B2 JP2007501778A JP2007501778A JP4777335B2 JP 4777335 B2 JP4777335 B2 JP 4777335B2 JP 2007501778 A JP2007501778 A JP 2007501778A JP 2007501778 A JP2007501778 A JP 2007501778A JP 4777335 B2 JP4777335 B2 JP 4777335B2
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gate
region
spacer
forming
channel
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JP2007525850A (ja
JP2007525850A5 (enExample
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チェン、ジアン
エイチ． アダムス、ヴァンス
イープ、チョー−フェイ
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NXP USA Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0184—Manufacturing their gate sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2007501778A 2004-03-01 2005-01-21 複合スペーサ絶縁領域幅を備えた集積回路の製造方法 Expired - Fee Related JP4777335B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/790,420 US7064396B2 (en) 2004-03-01 2004-03-01 Integrated circuit with multiple spacer insulating region widths
US10/790,420 2004-03-01
PCT/US2005/001916 WO2005091758A2 (en) 2004-03-01 2005-01-21 Integrated circuit with multiple spacer insulating region widths

Publications (3)

Publication Number Publication Date
JP2007525850A JP2007525850A (ja) 2007-09-06
JP2007525850A5 JP2007525850A5 (enExample) 2008-03-06
JP4777335B2 true JP4777335B2 (ja) 2011-09-21

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JP2007501778A Expired - Fee Related JP4777335B2 (ja) 2004-03-01 2005-01-21 複合スペーサ絶縁領域幅を備えた集積回路の製造方法

Country Status (7)

Country Link
US (2) US7064396B2 (enExample)
EP (1) EP1776719A4 (enExample)
JP (1) JP4777335B2 (enExample)
KR (1) KR101129070B1 (enExample)
CN (1) CN1926693B (enExample)
TW (1) TWI367520B (enExample)
WO (1) WO2005091758A2 (enExample)

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JP4746332B2 (ja) * 2005-03-10 2011-08-10 Ｏｋｉセミコンダクタ株式会社 半導体装置の製造方法
JP4515305B2 (ja) * 2005-03-29 2010-07-28 富士通セミコンダクター株式会社 ｐチャネルＭＯＳトランジスタおよびその製造方法、半導体集積回路装置の製造方法
DE102005030583B4 (de) * 2005-06-30 2010-09-30 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung von Kontaktisolationsschichten und Silizidgebieten mit unterschiedlichen Eigenschaften eines Halbleiterbauelements und Halbleiterbauelement
US20070095739A1 (en) * 2005-10-24 2007-05-03 Nikon Corporation Utility transfer apparatus, stage apparatus, exposure apparatus, and device manufacturing method
US20070281405A1 (en) * 2006-06-02 2007-12-06 International Business Machines Corporation Methods of stressing transistor channel with replaced gate and related structures
US20070278541A1 (en) * 2006-06-05 2007-12-06 Taiwan Semiconductor Manufacturing Company, Ltd. Spacer engineering on CMOS devices
US20080142879A1 (en) * 2006-12-14 2008-06-19 Chartered Semiconductor Manufacturing Ltd. Integrated circuit system employing differential spacers
US7510923B2 (en) 2006-12-19 2009-03-31 Texas Instruments Incorporated Slim spacer implementation to improve drive current
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JP2009026955A (ja) * 2007-07-19 2009-02-05 Panasonic Corp 半導体装置及びその製造方法
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JP5064289B2 (ja) * 2008-04-17 2012-10-31 パナソニック株式会社 半導体装置およびその製造方法
JP2011029610A (ja) * 2009-06-26 2011-02-10 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法
JP5268859B2 (ja) * 2009-10-23 2013-08-21 パナソニック株式会社 半導体装置
JP5435720B2 (ja) * 2009-12-21 2014-03-05 パナソニック株式会社 半導体装置
US8405160B2 (en) 2010-05-26 2013-03-26 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-strained source/drain structures
US8552503B2 (en) 2010-11-30 2013-10-08 United Microelectronics Corp. Strained silicon structure
CN102543990B (zh) * 2010-12-15 2015-09-09 联华电子股份有限公司 应变硅半导体结构
US8440530B2 (en) * 2011-10-18 2013-05-14 Globalfoundries Inc. Methods of forming highly scaled semiconductor devices using a disposable spacer technique
CN103811420B (zh) * 2012-11-08 2016-12-21 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制备方法
US9196712B1 (en) 2014-09-12 2015-11-24 Globalfoundries Inc. FinFET extension regions
KR102301249B1 (ko) * 2015-11-16 2021-09-10 삼성전자주식회사 반도체 장치
WO2019221706A1 (en) 2018-05-15 2019-11-21 Hewlett-Packard Development Company, L.P. Fluidic die with monitoring circuit fault protection structure

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WO2002043151A1 (fr) * 2000-11-22 2002-05-30 Hitachi, Ltd Dispositif a semi-conducteur et procede de fabrication correspondant
JP2003086708A (ja) * 2000-12-08 2003-03-20 Hitachi Ltd 半導体装置及びその製造方法
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JP2004193166A (ja) * 2002-12-06 2004-07-08 Toshiba Corp 半導体装置

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Also Published As

Publication number Publication date
JP2007525850A (ja) 2007-09-06
US20050190421A1 (en) 2005-09-01
CN1926693A (zh) 2007-03-07
TW200539259A (en) 2005-12-01
EP1776719A4 (en) 2009-04-01
EP1776719A2 (en) 2007-04-25
WO2005091758A2 (en) 2005-10-06
WO2005091758A3 (en) 2006-01-26
KR20060132920A (ko) 2006-12-22
TWI367520B (en) 2012-07-01
US7064396B2 (en) 2006-06-20
CN1926693B (zh) 2010-10-20
KR101129070B1 (ko) 2012-03-26
US20060011988A1 (en) 2006-01-19

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