JP4638481B2 - 差動段電圧オフセットトリム回路 - Google Patents
差動段電圧オフセットトリム回路 Download PDFInfo
- Publication number
- JP4638481B2 JP4638481B2 JP2007506141A JP2007506141A JP4638481B2 JP 4638481 B2 JP4638481 B2 JP 4638481B2 JP 2007506141 A JP2007506141 A JP 2007506141A JP 2007506141 A JP2007506141 A JP 2007506141A JP 4638481 B2 JP4638481 B2 JP 4638481B2
- Authority
- JP
- Japan
- Prior art keywords
- current
- node
- differential pair
- differential
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45632—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
- H03F3/45744—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/301—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in MOSFET amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45632—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
- H03F3/45695—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by using feedforward means
- H03F3/4573—Measuring at the common source circuit of the differential amplifier
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45212—Indexing scheme relating to differential amplifiers the differential amplifier being designed to have a reduced offset
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45406—Indexing scheme relating to differential amplifiers the CMCL comprising a common source node of a long tail FET pair as an addition circuit
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US55840104P | 2004-03-31 | 2004-03-31 | |
| US10/911,371 US7049889B2 (en) | 2004-03-31 | 2004-08-03 | Differential stage voltage offset trim circuitry |
| PCT/US2004/043313 WO2005104358A1 (en) | 2004-03-31 | 2004-12-16 | Differential stage voltage offset trim circuitry |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2007531459A JP2007531459A (ja) | 2007-11-01 |
| JP4638481B2 true JP4638481B2 (ja) | 2011-02-23 |
Family
ID=34959841
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007506141A Expired - Fee Related JP4638481B2 (ja) | 2004-03-31 | 2004-12-16 | 差動段電圧オフセットトリム回路 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7049889B2 (https=) |
| EP (1) | EP1721386B1 (https=) |
| JP (1) | JP4638481B2 (https=) |
| DE (1) | DE602004023434D1 (https=) |
| WO (1) | WO2005104358A1 (https=) |
Families Citing this family (35)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7250819B2 (en) * | 2004-12-16 | 2007-07-31 | Analog Devices, Inc. | Input tracking current mirror for a differential amplifier system |
| US7920017B2 (en) * | 2004-12-16 | 2011-04-05 | Analog Devices, Inc. | Programmable clock booster system |
| JP2006352272A (ja) * | 2005-06-13 | 2006-12-28 | Renesas Technology Corp | 半導体集積回路装置 |
| US8502557B2 (en) | 2006-06-05 | 2013-08-06 | Analog Devices, Inc. | Apparatus and methods for forming electrical networks that approximate desired performance characteristics |
| US20080094107A1 (en) * | 2006-10-20 | 2008-04-24 | Cortina Systems, Inc. | Signal magnitude comparison apparatus and methods |
| JP4695621B2 (ja) * | 2007-04-25 | 2011-06-08 | ルネサスエレクトロニクス株式会社 | 半導体回路 |
| JP2008301083A (ja) * | 2007-05-30 | 2008-12-11 | Mitsubishi Electric Corp | 差動信号生成回路 |
| US9356568B2 (en) | 2007-06-05 | 2016-05-31 | Analog Devices, Inc. | Apparatus and methods for chopper amplifiers |
| WO2009092475A2 (en) * | 2008-01-25 | 2009-07-30 | International Business Machines Corporation | Method and apparatus for improvement of matching fet currents using a digital to analog converter |
| US7944309B2 (en) * | 2009-03-18 | 2011-05-17 | Qualcomm, Incorporated | Transconductance bias circuit, amplifier and method |
| US7956679B2 (en) * | 2009-07-29 | 2011-06-07 | Freescale Semiconductor, Inc. | Differential amplifier with offset voltage trimming |
| US10720919B2 (en) | 2011-11-16 | 2020-07-21 | Analog Devices, Inc. | Apparatus and methods for reducing charge injection mismatch in electronic circuits |
| US8816773B2 (en) | 2012-10-04 | 2014-08-26 | Analog Devices, Inc. | Offset current trim circuit |
| US9887552B2 (en) * | 2013-03-14 | 2018-02-06 | Analog Devices, Inc. | Fine timing adjustment method |
| EP2851762B1 (en) * | 2013-09-24 | 2017-12-06 | STMicroelectronics International N.V. | Feedback network for low-drop-out generator |
| US9444405B1 (en) * | 2015-09-24 | 2016-09-13 | Freescale Semiconductor, Inc. | Methods and structures for dynamically reducing DC offset |
| WO2017132292A1 (en) * | 2016-01-25 | 2017-08-03 | Kandou Labs, S.A. | Voltage sampler driver with enhanced high-frequency gain |
| TWI600271B (zh) * | 2016-11-04 | 2017-09-21 | 茂達電子股份有限公司 | 運算放大器及降低其偏移電壓的方法 |
| JP6830079B2 (ja) * | 2018-03-30 | 2021-02-17 | 日本電信電話株式会社 | トラック・アンド・ホールド回路 |
| US10931249B2 (en) | 2018-06-12 | 2021-02-23 | Kandou Labs, S.A. | Amplifier with adjustable high-frequency gain using varactor diodes |
| US10742451B2 (en) | 2018-06-12 | 2020-08-11 | Kandou Labs, S.A. | Passive multi-input comparator for orthogonal codes on a multi-wire bus |
| US10587228B2 (en) * | 2018-07-12 | 2020-03-10 | Analog Devices, Inc. | Common mode rejection including temperature drift correction |
| US11183983B2 (en) | 2018-09-10 | 2021-11-23 | Kandou Labs, S.A. | Programmable continuous time linear equalizer having stabilized high-frequency peaking for controlling operating current of a slicer |
| US10680634B1 (en) | 2019-04-08 | 2020-06-09 | Kandou Labs, S.A. | Dynamic integration time adjustment of a clocked data sampler using a static analog calibration circuit |
| US10608849B1 (en) | 2019-04-08 | 2020-03-31 | Kandou Labs, S.A. | Variable gain amplifier and sampler offset calibration without clock recovery |
| US10574487B1 (en) | 2019-04-08 | 2020-02-25 | Kandou Labs, S.A. | Sampler offset calibration during operation |
| US11082012B2 (en) * | 2019-05-10 | 2021-08-03 | Cirrus Logic, Inc. | Highly linear input and output rail-to-rail amplifier |
| WO2021070246A1 (ja) * | 2019-10-08 | 2021-04-15 | 三菱電機株式会社 | 演算増幅器 |
| US11303484B1 (en) | 2021-04-02 | 2022-04-12 | Kandou Labs SA | Continuous time linear equalization and bandwidth adaptation using asynchronous sampling |
| US11374800B1 (en) | 2021-04-14 | 2022-06-28 | Kandou Labs SA | Continuous time linear equalization and bandwidth adaptation using peak detector |
| US11456708B1 (en) | 2021-04-30 | 2022-09-27 | Kandou Labs SA | Reference generation circuit for maintaining temperature-tracked linearity in amplifier with adjustable high-frequency gain |
| US11914410B2 (en) | 2021-06-07 | 2024-02-27 | Texas Instruments Incorporated | Accuracy trim architecture for high precision voltage reference |
| CN114448369B (zh) * | 2021-12-24 | 2026-01-02 | 深圳市汇顶科技股份有限公司 | 放大电路、相关芯片及电子装置 |
| US12355409B2 (en) | 2022-03-24 | 2025-07-08 | Kandou Labs SA | Variable gain amplifier with cross-coupled common mode reduction |
| CN117097272B (zh) * | 2023-08-18 | 2024-05-03 | 北京中科格励微科技有限公司 | 一种运算放大器组合电路及自调整运算放大器 |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5573114A (en) * | 1978-11-28 | 1980-06-02 | Nippon Gakki Seizo Kk | Output offset control circuit for full step direct-coupled amplifier |
| JPS60213108A (ja) * | 1984-04-06 | 1985-10-25 | Hitachi Ltd | 増幅回路 |
| JPS63260206A (ja) * | 1987-04-16 | 1988-10-27 | Nec Corp | オフセツト電圧制御回路 |
| US4827222A (en) * | 1987-12-11 | 1989-05-02 | Vtc Incorporated | Input offset voltage trimming network and method |
| JPH02112307A (ja) * | 1988-10-20 | 1990-04-25 | Fujitsu Ltd | 差動増幅器のオフセット調整回路 |
| JPH0446709U (https=) * | 1990-08-27 | 1992-04-21 | ||
| JPH04130808A (ja) * | 1990-09-21 | 1992-05-01 | Toshiba Corp | 差動増幅器 |
| DE19706985B4 (de) * | 1997-02-21 | 2004-03-18 | Telefonaktiebolaget L M Ericsson (Publ) | Eingangspufferschaltkreis |
| JP3788660B2 (ja) * | 1997-06-12 | 2006-06-21 | 松下電器産業株式会社 | 漏洩電流減衰装置 |
| JPH11251848A (ja) * | 1998-03-05 | 1999-09-17 | Nec Corp | チューナブルmos線形トランスコンダクタンス・アンプ |
| JPH11272786A (ja) * | 1998-03-25 | 1999-10-08 | Seiko Instruments Inc | 差動増幅回路 |
| US6194962B1 (en) | 1999-04-13 | 2001-02-27 | Analog Devices, Inc. | Adaptive operational amplifier offset voltage trimming system |
| US6229394B1 (en) * | 1999-09-17 | 2001-05-08 | Elantec Semiconductor, Inc. | Circuit providing a negative resistance to offset error voltage for use with a folded cascode amplifier |
| US6310519B1 (en) * | 2000-06-08 | 2001-10-30 | Mitsubishi Electric & Electronics U.S.A., Inc. | Method and apparatus for amplifier output biasing for improved overall temperature stability |
| US6400219B1 (en) * | 2000-08-16 | 2002-06-04 | Texas Instruments Incorporated | High-speed offset comparator |
| US6522200B2 (en) | 2000-12-11 | 2003-02-18 | Texas Instruments Incorporated | Process-insensitive, highly-linear constant transconductance circuit |
| US6617926B2 (en) * | 2001-06-29 | 2003-09-09 | Intel Corporation | Tail current node equalization for a variable offset amplifier |
| US6696894B1 (en) | 2002-06-12 | 2004-02-24 | Analog Devices, Inc. | Operational amplifier with independent input offset trim for high and low common mode input voltages |
-
2004
- 2004-08-03 US US10/911,371 patent/US7049889B2/en not_active Expired - Lifetime
- 2004-12-16 JP JP2007506141A patent/JP4638481B2/ja not_active Expired - Fee Related
- 2004-12-16 DE DE602004023434T patent/DE602004023434D1/de not_active Expired - Lifetime
- 2004-12-16 WO PCT/US2004/043313 patent/WO2005104358A1/en not_active Ceased
- 2004-12-16 EP EP04815394A patent/EP1721386B1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| DE602004023434D1 (https=) | 2009-11-12 |
| WO2005104358A1 (en) | 2005-11-03 |
| US7049889B2 (en) | 2006-05-23 |
| JP2007531459A (ja) | 2007-11-01 |
| US20050218980A1 (en) | 2005-10-06 |
| EP1721386B1 (en) | 2009-09-30 |
| EP1721386A1 (en) | 2006-11-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4638481B2 (ja) | 差動段電圧オフセットトリム回路 | |
| CN102668373B (zh) | 用于获得跨导放大器的增益线性变化的驱动方法和相对应的驱动电路 | |
| JP4395067B2 (ja) | 高/低同相モード入力電圧のための独立入力オフセット補正機能付演算増幅器 | |
| JP4538050B2 (ja) | 電流モード計装用増幅器のゲインエラー補正回路 | |
| JP5690469B2 (ja) | 差動増幅器、基準電圧発生回路、差動増幅方法及び基準電圧発生方法 | |
| KR20130048714A (ko) | 동적 범위가 넓은 레일-레일 비교기를 위한 오프셋 교정 및 정밀 히스테리시스 | |
| CN100571025C (zh) | 差分级电压偏置微调电路 | |
| EP1908168B1 (en) | Temperature-independent amplifier offset trim circuit | |
| WO2019150744A1 (ja) | 補正電流出力回路及び補正機能付き基準電圧回路 | |
| US7907012B2 (en) | Current mirror with low headroom and linear response | |
| US11632091B2 (en) | Operational amplifier | |
| JP5262718B2 (ja) | バイアス回路 | |
| KR101022340B1 (ko) | 제어전압 발생회로 및 이를 포함하는 연산 증폭기 | |
| JP2007094800A (ja) | 基準電圧発生回路 | |
| JP2006338434A (ja) | 基準電圧発生回路 | |
| Meaamar et al. | Low-voltage, high-performance current mirror circuit techniques | |
| CN118276633B (zh) | 一种自带工艺误差补偿的电压跟随器及方法 | |
| US12085971B2 (en) | MOS-based current mirror circuit with push-pull amplifier | |
| JP7810550B2 (ja) | バイアス回路及びab級増幅回路 | |
| KR100284908B1 (ko) | Cmos온-칩전류레퍼런스회로 | |
| JP2001177349A (ja) | 2個のmosトランジスタのゲート・ソース電圧間の差を補償する回路 | |
| Danchiv et al. | Total transconductance optimization for a rail to rail amplifier | |
| CN119311075A (zh) | 用于电压偏移补偿的电路 | |
| JP2025034330A (ja) | 基準電圧源回路 | |
| TWI542968B (zh) | 可調式鏡射比率之電流鏡 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20090805 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090819 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20091104 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100426 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100726 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20101027 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20101125 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20131203 Year of fee payment: 3 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 4638481 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |