JP4634141B2 - 集積回路構成部分に接続されるダイ - Google Patents
集積回路構成部分に接続されるダイ Download PDFInfo
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- JP4634141B2 JP4634141B2 JP2004510031A JP2004510031A JP4634141B2 JP 4634141 B2 JP4634141 B2 JP 4634141B2 JP 2004510031 A JP2004510031 A JP 2004510031A JP 2004510031 A JP2004510031 A JP 2004510031A JP 4634141 B2 JP4634141 B2 JP 4634141B2
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
- B81C1/00238—Joining a substrate with an electronic processing unit and a substrate with a micromechanical structure
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/0045—Packages or encapsulation for reducing stress inside of the package structure
- B81B7/0054—Packages or encapsulation for reducing stress inside of the package structure between other parts not provided for in B81B7/0048 - B81B7/0051
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2207/00—Microstructural systems or auxiliary parts thereof
- B81B2207/07—Interconnects
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/07—Integrating an electronic processing unit with a micromechanical structure
- B81C2203/0785—Transfer and j oin technology, i.e. forming the electronic processing unit and the micromechanical structure on separate substrates and joining the substrates
- B81C2203/0792—Forming interconnections between the electronic processing unit and the micromechanical structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1433—Application-specific integrated circuit [ASIC]
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Micromachines (AREA)
- Wire Bonding (AREA)
Description
他の例において、演算電子回路がダイと組み合わせて使用される。演算電子回路とダイの双方とも、基板や回路板などへの電気的接続をもたらさなければならない。2つの独立する接続空間は基板上や回路板上などで使用されなければならない。
他の例において、演算電子回路およびダイは一緒に試験を受けなければならない。演算電子回路およびダイを一緒に試験するために、それらは基板や回路板などに搭載されなければならない。
本発明の例示的実施の特徴は、説明、特許請求の範囲、および、添付の図面から明らかになる。
図6(図1の断面6−6)を参照すると、1つの例において、応従性構成部分116は、ダイ102のカバー160上のエッチングされた井戸610に位置する。井戸610は応従性構成部分116の屈曲を可能にするために十分大きなサイズおよび形状である。他の例において、応従性構成部分116はダイ102のカバー160の表面180上にある。
電気構成部分1220をダイ102内に集積させることは、独立層310に完全に搭載せずに、電気構成部分1220およびダイ102を一緒に試験することを考慮する。
Claims (10)
- 少なくとも第1及び第2の部分を備えるダイであって、前記ダイの前記第1の部分が機械的かつ電気的に回路板に接続可能であるダイと、
前記ダイの前記第2の部分に機械的かつ電気的に接続される集積回路構成部分を含み、
前記ダイは、動作の際、前記集積回路構成部分に通過される1つ又は複数の電気信号を発生させるために機能し、
該ダイの第1の部分は、該ダイを該回路板に電気的且つ機械的に接続するように機能する電気的インターフェイス構成部分を支持する応従性片持ち梁構成部分を含む装置。 - 請求項1に記載の装置において、
前記1つ又は複数の電気信号は1つ又は複数の第1の電気信号を含み、
動作の際、前記集積回路構成部分は、前記回路板への出力のために前記ダイに通過される前記1つ又は複数の第1の電気信号に基づき、1つ又は複数の第2の電気信号を発生するために機能し、
該集積回路構成部分は、該1つ又は複数の第2の電気信号のうちの1つ又は複数を該電気的インターフェイス構成部分に通過させる装置。 - 請求項1に記載の装置において、該ダイと該回路板との間で相対的な運動があった場合に、該応従性片持ち梁構成部分は、該ダイと該回路板のうちの1つ又は複数の中の応力の減少を促進するように機能する装置。
- 請求項3に記載の装置において、該ダイは中心部分を備え、該ダイは、該ダイの中心部分と該電気的インターフェイス構成部分との間に放射状の範囲を備え、
該応従性片持ち梁構成部分は、該ダイの放射状の範囲と実質的に垂直である装置。 - 請求項4に記載の装置において、
該相対的な運動は、相対的な膨張を含み、
該放射状の範囲に沿って該ダイと該回路板との間で相対的な膨張があった場合に、該従応性片持ち梁構成部分は、該相対的な膨張に適応し、
該従応性片持ち梁構成部分は、撓むことで、該ダイと該回路板のうちの1つ又は複数の応力を減少させる装置。 - 請求項1に記載の装置において、
該ダイの該第1の部分は、1つの凹部を含み、
該従応性片持ち梁構成部分は、該凹部の中に位置し、
該凹部は、該従応性片持ち梁構成部分が該ダイと該回路板との間の相対的な運動に適応するための運動をするのに必要な空間を提供する装置。 - 請求項1に記載の装置において、該回路板は、1つ又は複数の電気的インターフェイス構成部分を含み、
該ダイは、該1つ又は複数の電気的インターフェイス構成部分を通じて該回路板と電気的且つ機械的に接続可能であり、
該集積回路構成部分は、該1つ又は複数の電気的インターフェイス構成部分を通じて該回路板と通信する装置。 - 請求項1に記載の装置において、
該集積回路構成部分は、該ダイの外側表面内に、又は、該ダイの該外側表面内の凹部に取り付けられる装置。 - 請求項1に記載の装置において、
該ダイの第2の部分は、1つのインターフェイス表面を含み、
該集積回路構成部分は、外側表面を含み、
該インターフェイス表面と該外側表面は、実質的に同一平面内にある装置。 - 請求項1に記載の装置において、
該ダイの該第2の部分は、該ダイの第1のインターフェイス表面を含み、該第1のインターフェイス表面は、1つ又は複数の第1の電気的インターフェイス構成部分と1つ又は複数の第2の電気的インターフェイス構成部分とを含み、
該1つ又は複数の第1の電気的インターフェイス構成部分は、該集積回路構成部分に入力を与え、該1つ又は複数の第2の電気的インターフェイス構成部分は、該集積回路構成部分からの出力を受信し、
該ダイの該第1の部分は、該ダイの第2のインターフェイス表面を含み、該第2のインターフェイス表面は、1つ又は複数の電気的インターフェイス構成部分を含み、
1つ又は複数の接続経路は、該第2のインターフェイス表面の該1つ又は複数の電気的インターフェイス構成部分を該第1のインターフェイス表面の該1つ又は複数の第1の電気的インターフェイス構成部分にそれぞれ電気的に接続する装置。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/159,777 US6992399B2 (en) | 2002-05-24 | 2002-05-31 | Die connected with integrated circuit component for electrical signal passing therebetween |
PCT/US2003/016136 WO2003103048A1 (en) | 2002-05-31 | 2003-05-21 | Die connected with integrated circuit component |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005528235A JP2005528235A (ja) | 2005-09-22 |
JP4634141B2 true JP4634141B2 (ja) | 2011-02-16 |
Family
ID=29583019
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004510031A Expired - Fee Related JP4634141B2 (ja) | 2002-05-31 | 2003-05-21 | 集積回路構成部分に接続されるダイ |
Country Status (8)
Country | Link |
---|---|
US (1) | US6992399B2 (ja) |
EP (1) | EP1512176B1 (ja) |
JP (1) | JP4634141B2 (ja) |
KR (1) | KR100913275B1 (ja) |
AU (1) | AU2003243292A1 (ja) |
CA (1) | CA2483272A1 (ja) |
DE (1) | DE60333289D1 (ja) |
WO (1) | WO2003103048A1 (ja) |
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KR101871865B1 (ko) | 2010-09-18 | 2018-08-02 | 페어차일드 세미컨덕터 코포레이션 | 멀티-다이 mems 패키지 |
KR101352827B1 (ko) | 2010-09-18 | 2014-01-17 | 페어차일드 세미컨덕터 코포레이션 | 단일 프루프 매스를 가진 미세기계화 3축 가속도계 |
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2002
- 2002-05-31 US US10/159,777 patent/US6992399B2/en not_active Expired - Lifetime
-
2003
- 2003-05-21 EP EP03756194A patent/EP1512176B1/en not_active Expired - Lifetime
- 2003-05-21 CA CA 2483272 patent/CA2483272A1/en not_active Abandoned
- 2003-05-21 KR KR20047017492A patent/KR100913275B1/ko not_active IP Right Cessation
- 2003-05-21 WO PCT/US2003/016136 patent/WO2003103048A1/en not_active Application Discontinuation
- 2003-05-21 JP JP2004510031A patent/JP4634141B2/ja not_active Expired - Fee Related
- 2003-05-21 AU AU2003243292A patent/AU2003243292A1/en not_active Abandoned
- 2003-05-21 DE DE60333289T patent/DE60333289D1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
CA2483272A1 (en) | 2003-12-11 |
AU2003243292A1 (en) | 2003-12-19 |
EP1512176B1 (en) | 2010-07-07 |
WO2003103048A1 (en) | 2003-12-11 |
US20030222337A1 (en) | 2003-12-04 |
KR100913275B1 (ko) | 2009-08-21 |
US6992399B2 (en) | 2006-01-31 |
JP2005528235A (ja) | 2005-09-22 |
DE60333289D1 (de) | 2010-08-19 |
EP1512176A1 (en) | 2005-03-09 |
KR20050009701A (ko) | 2005-01-25 |
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