JP4550901B2 - デジタル・アナログ変換器 - Google Patents
デジタル・アナログ変換器 Download PDFInfo
- Publication number
- JP4550901B2 JP4550901B2 JP2007531737A JP2007531737A JP4550901B2 JP 4550901 B2 JP4550901 B2 JP 4550901B2 JP 2007531737 A JP2007531737 A JP 2007531737A JP 2007531737 A JP2007531737 A JP 2007531737A JP 4550901 B2 JP4550901 B2 JP 4550901B2
- Authority
- JP
- Japan
- Prior art keywords
- dac
- digital
- resistor ladder
- analog converter
- digital input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000012937 correction Methods 0.000 claims description 10
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 8
- 230000008878 coupling Effects 0.000 claims description 3
- 238000010168 coupling process Methods 0.000 claims description 3
- 238000005859 coupling reaction Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 238000012360 testing method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 12
- 230000000694 effects Effects 0.000 description 12
- 238000002347 injection Methods 0.000 description 5
- 239000007924 injection Substances 0.000 description 5
- 230000006870 function Effects 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
- H03M1/1033—Calibration over the full range of the converter, e.g. for correcting differential non-linearity
- H03M1/1057—Calibration over the full range of the converter, e.g. for correcting differential non-linearity by trimming, i.e. by individually adjusting at least part of the quantisation value generators or stages to their nominal values
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/78—Simultaneous conversion using ladder network
- H03M1/785—Simultaneous conversion using ladder network using resistors, i.e. R-2R ladders
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US61146904P | 2004-09-20 | 2004-09-20 | |
| US11/048,374 US7095351B2 (en) | 2004-09-20 | 2005-02-01 | Digital-to-analog converter structures |
| PCT/EP2005/054141 WO2006032592A1 (en) | 2004-09-20 | 2005-08-23 | Digital-to-analog converter structures |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2008514065A JP2008514065A (ja) | 2008-05-01 |
| JP2008514065A5 JP2008514065A5 (enExample) | 2008-10-23 |
| JP4550901B2 true JP4550901B2 (ja) | 2010-09-22 |
Family
ID=35159837
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007531737A Expired - Fee Related JP4550901B2 (ja) | 2004-09-20 | 2005-08-23 | デジタル・アナログ変換器 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7095351B2 (enExample) |
| EP (1) | EP1792402B1 (enExample) |
| JP (1) | JP4550901B2 (enExample) |
| CN (1) | CN101023583B (enExample) |
| DE (1) | DE602005015464D1 (enExample) |
| TW (1) | TWI296880B (enExample) |
| WO (1) | WO2006032592A1 (enExample) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7173552B1 (en) * | 2003-10-01 | 2007-02-06 | Analog Devices, Inc. | High accuracy segmented DAC |
| TWI330001B (en) * | 2006-08-15 | 2010-09-01 | Realtek Semiconductor Corp | Dynamic bias control circuit and related apparatus for digital-to-analog converter |
| US7688240B2 (en) * | 2008-05-02 | 2010-03-30 | Analog Devices, Inc. | Method and apparatus for calibrating an RDAC for end-to-end tolerance correction of output resistance |
| CN101345527B (zh) * | 2008-07-09 | 2010-06-02 | 清华大学 | 一种基于CeRAM单元的数模变换器 |
| DE102010016556A1 (de) * | 2009-04-24 | 2010-11-25 | Intersil Americas Inc., Milpitas | Widerstands-Feineinstellung für Polysilizium |
| US8164495B2 (en) * | 2009-11-12 | 2012-04-24 | Intersil Americas Inc. | Integrated non-linearity (INL) and differential non-linearity (DNL) correction techniques for digital-to-analog converters (DACS) |
| CN101834605B (zh) * | 2010-04-12 | 2013-03-06 | 智原科技股份有限公司 | 模拟数字转换器的测试系统与测试方法 |
| CN101924554B (zh) * | 2010-06-30 | 2013-07-03 | 中国电子科技集团公司第五十八研究所 | 电荷耦合流水线模数转换器的共模误差校准电路 |
| WO2012009133A1 (en) | 2010-07-15 | 2012-01-19 | Analog Devices, Inc. | Programmable linearity correction circuit for digital-to-analog converter |
| JP6043052B2 (ja) * | 2011-06-20 | 2016-12-14 | ティアック株式会社 | Da変換装置 |
| CN102545906B (zh) * | 2012-02-10 | 2015-01-07 | 英特格灵芯片(天津)有限公司 | 电流型数模转换方法和装置 |
| US8537043B1 (en) * | 2012-04-12 | 2013-09-17 | Analog Devices, Inc. | Digital-to-analog converter with controlled gate voltages |
| US8576101B1 (en) | 2012-11-05 | 2013-11-05 | Google Inc. | Calibration of an R2R ladder based current digital-to-analog converter (DAC) |
| US8912939B2 (en) * | 2012-12-14 | 2014-12-16 | Analog Devices Technology | String DAC leakage current cancellation |
| CN103795415A (zh) * | 2014-01-24 | 2014-05-14 | 中国人民解放军国防科学技术大学 | 基于双路组合数模转换器的高精度数模转换方法及装置 |
| CN104168026B (zh) * | 2014-08-25 | 2017-09-15 | 长沙瑞达星微电子有限公司 | 一种分段式电流舵dac电路 |
| US9276598B1 (en) * | 2015-05-22 | 2016-03-01 | Texas Instruments Incorporated | Trim-matched segmented digital-to-analog converter apparatus, systems and methods |
| US10425098B2 (en) | 2017-05-04 | 2019-09-24 | Analog Devices Global | Digital-to-analog converter (DAC) termination |
| CN110663188B (zh) * | 2017-06-21 | 2023-04-04 | 德州仪器公司 | 分段式数/模转换器 |
| US10892771B1 (en) * | 2019-09-25 | 2021-01-12 | Texas Instruments Incorporated | Segmented resistor digital-to-analog converter |
| WO2021133708A1 (en) * | 2019-12-23 | 2021-07-01 | Texas Instruments Incorporated | Hybrid multiplying digital analog converter |
| US12261622B2 (en) * | 2021-06-25 | 2025-03-25 | Intel Corporation | Circuitry for digital-to-analog conversion, differential systems and digital-to-analog converter |
| CN113517891B (zh) * | 2021-09-13 | 2022-01-04 | 成都爱旗科技有限公司 | 一种应用于数模转换器的线性校准系统和方法 |
| CN115694483B (zh) * | 2022-10-17 | 2024-03-29 | 电子科技大学 | 电阻网络、低温数模转换器电路、芯片及相关装置 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5119094A (en) * | 1989-11-20 | 1992-06-02 | Analog Devices, Inc. | Termination circuit for an r-2r, ladder that compensates for the temperature drift caused by different current densities along the ladder, using one type of biopolar transistor |
| US5764174A (en) * | 1996-05-14 | 1998-06-09 | Analog Devices, Inc. | Switch architecture for R/2R digital to analog converters |
| JPH1117547A (ja) | 1997-06-19 | 1999-01-22 | Sanyo Electric Co Ltd | D/a変換器 |
| JP4311511B2 (ja) * | 1999-10-25 | 2009-08-12 | 日本バーブラウン株式会社 | デジタル−アナログ変換の方法および装置 |
| JP3803900B2 (ja) | 1999-11-01 | 2006-08-02 | ローム株式会社 | ディジタル・アナログ変換器 |
| US6429798B1 (en) * | 2000-02-08 | 2002-08-06 | Ericsson Inc. | Combined transmit filter and D-to-A converter |
-
2005
- 2005-02-01 US US11/048,374 patent/US7095351B2/en not_active Expired - Lifetime
- 2005-08-23 DE DE602005015464T patent/DE602005015464D1/de not_active Expired - Lifetime
- 2005-08-23 WO PCT/EP2005/054141 patent/WO2006032592A1/en not_active Ceased
- 2005-08-23 EP EP05774067A patent/EP1792402B1/en not_active Expired - Lifetime
- 2005-08-23 CN CN2005800312534A patent/CN101023583B/zh not_active Expired - Fee Related
- 2005-08-23 JP JP2007531737A patent/JP4550901B2/ja not_active Expired - Fee Related
- 2005-09-20 TW TW094132559A patent/TWI296880B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| EP1792402B1 (en) | 2009-07-15 |
| US7095351B2 (en) | 2006-08-22 |
| CN101023583B (zh) | 2012-10-10 |
| US20060061500A1 (en) | 2006-03-23 |
| JP2008514065A (ja) | 2008-05-01 |
| EP1792402A1 (en) | 2007-06-06 |
| TW200637160A (en) | 2006-10-16 |
| DE602005015464D1 (de) | 2009-08-27 |
| WO2006032592A1 (en) | 2006-03-30 |
| TWI296880B (en) | 2008-05-11 |
| CN101023583A (zh) | 2007-08-22 |
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