WO2021133708A1

WO2021133708A1 - Hybrid multiplying digital analog converter

Info

Publication number: WO2021133708A1
Application number: PCT/US2020/066319
Authority: WO
Inventors: Rajavelu Thinakaran
Original assignee: Texas Instruments Incorporated; Texas Instruments Japan Limited
Priority date: 2019-12-23
Filing date: 2020-12-21
Publication date: 2021-07-01

Abstract

A digital to analog converter (DAC) device (200) includes a thermometric DAC segment (202) responsive to a thermometric encoding of a first portion of a digital code, a binary scaled DAC segment (204) responsive to a second portion of the digital code, and a resistor ladder DAC segment (205) responsive to a third portion of the digital code. The thermometric DAC segment (202) includes a plurality of first resistors (212, 216, 220) connected to a reference voltage (201) in parallel and is configured to selectively connect the first plurality of resistors (212, 216, 220) to a current output node (277) based on the thermometric encoding. The binary scaled DAC segment (204) includes a plurality of second resistors (232, 236, 240, 244) connected to the reference voltage in parallel and having binary scaled resistances. The binary scaled DAC segment (204) is configured to selectively connect the plurality of second resistors (232, 236, 240, 244) to the current output node (277) based on the second portion.

Description

HYBRID MULTIPLYING DIGITAL ANALOG CONVERTER

BACKGROUND

[0001] Digital to analog converters (DACs) are common components of many electronic devices. A DAC receives an input digital code and outputs an analog signal based on the code. One type of DAC in use today is a multiplying DAC (MDAC). An MDAC uses a resistor ladder to weight a contribution of each bit of the input code to an output current based on an order of the bit. Due to the resistor ladder, higher order bits of the code affect the output current more than lower order bits. Such MDACs often include or are connected to an operational amplifier to convert the output current into an output voltage. A relationship between an input code (code) and a DAC output voltage (VQUT) of an N-bit MDAC may be given by the equation

where the code is a value between 0 and

and VREF is a reference voltage

received by the MDAC. However, integral non-linearity (INL) and differential non-linearity (DNL) may cause actual output of an MDAC to vary from the output indicated by this equation. [0002] Typically in a DAC, the main cause of non-linearity (Integral non-linearity (INL) and Differential non-linearity(DNL)is mismatch in resistor and/or switches included in the ladder. In the case of MDAC, another significant cause of INL/DNL is the input referred voltage offset of the OPAMP.

SUMMARY

[0003] A hybrid multiplying digital to analog converter (MDAC) is disclosed. The hybrid MDAC includes a R-2R DAC segment, a binary scaled resistive DAC (RDAC) segment, and a thermo-metric RDAC segment. The thermo-metric coded DAC segment is configured to selectively connect resistors connected to a reference voltage to an output based on X most significant bits of an input code. The R-2R DAC segment is configured to selectively connect laddered resistors connected to the reference voltage to the output based on Z least significant bits of the input code. The binary scaled RDAC segment is configured to selectively connect binary scaled resistors connected to the reference voltage to the output based on Y bits between the X most significant bits and the Z least significant bits of the input code. Accordingly, a current at the output is based on the thermo-metric RDAC segment, the binary scaled RDAC segment, and the R-2R DAC segment. An input referred voltage offset (V_os) of the OP AMP results in a output voltage error given by

where

is the equivalent output conductance of the MDAC,

is the output conductance of the thermo-metric coded DAC segment, G_bmaiyscaicd is the output conductance of the binary scaled resistive DAC segment, and G_R2R is the output conductance of the R-2R DAC segment. The output conductance (e.g., conductance at the output) of the thermo metric section (G_rtherm) varies linearly with the input code processed by the thermo-metric coded DAC segment (e.g.,: G_rtherm varies from 0, 1/R ,2/R, .,15/R as code varies from 0, 1 , 2, ..., 2^X-1). Similarly the output conductance of the binary scaled RDAC segment

varies linearly with the code processed by the binary scaled RDAC segment (e.g.,: varies from

0,1/(16R),1/(8R),3/(16R),...,15/(16R)) as code varies from 0, 1, 2, ... 2^Y-1). Hence the output voltage error due to V_os increases linearly with the code corresponding to X+Y MSB bits. An error in DAC output which increases linearly with code is classified as Gain error which can be easily calibrated and does not cause non-linearity. On the other hand, the output conductance (GR₂R) of the R2R segment is a complex non-linear function of the Z least significant bits. Hence the voltage error due to Vos varies non-linearly with the Z LSB bits of the DAC resulting in increased INL/DNL. Thus the use the thermo-metric RDAC segment and the binary scaled RDAC segment results in less nonlinearity (INL and DNL) due to OP AMP offset as compared to a DAC which uses only the R-2R DAC segment. Accordingly, the hybrid MDAC may have decreased INL as compared to an R-2R DAC.

BRIEF DESCRIPTION OF THE DRAWINGS

[0004] For a detailed description of various examples, reference will now be made to the accompanying drawings in which:

[0005] FIG. 1 illustrates a prior art digital to analog converter (DAC).

[0006] FIG. 2 illustrates an example of a hybrid MDAC that includes a binary scaled DAC segment.

[0007] FIG. 3 illustrates an example of a hybrid MDAC that does not include rescaling between a binary scaled DAC segment and an R-2R DAC segment.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

[0008] Referring to FIG. 1, a prior art multiplying digital to analog converter (MDAC) 100 is shown. The MDAC 100 includes a thermometric resistive DAC (RDAC) segment 102 and an R- 2R DAC segment 104. The illustrated prior art MDAC 100 is configured to convert an 18 bit input digital code into an analog output signal. The thermometric RDAC segment 102 is configured to convert 4 most significant bits of the input digital code and the R-2R DAC segment 104 is configured to convert 14 least significant bits of the input digital code.

[0009] The thermometric RDAC segment 102 includes 15 sections (e.g., a section for each decimal value other than zero that can be represented by the 4 most significant bits). Each section of the thermometric RDAC segment 102 includes a resistor and a pair of switches. One terminal of the resistor is connected to VREF and the other terminal of the resistor is connected either to a current output node (I_OUT) or ground by the pair of switches depending on the input digital code. The sections of the thermometric RDAC segment 102 are arranged in parallel. Accordingly, a conductance of the thermometric RDAC segment 102 varies between 0 and 15/R. FIG. 1 depicts a first section 106 of the thermometric RDAC segment 102, a second section 108 of the thermometric RDAC segment 102, and a third section 110 of the thermometric RDAC segment 102

[0010] The first section 106 of the thermometric RDAC segment 102 includes a first pair of switches 114a and a first resistor 112 connected to a reference voltage. The first pair of switches 114 is configured to toggle one terminal of the first resistor 112 to either I₀UT or ground 186 based on a most significant digit of a thermometric (e.g., unary) encoding of the four most significant bits of the input digital code. The second section 108 of the thermometric RDAC segment 102 includes a second resistor 116 and a pair of switches 118. The pair of switches 118 is configured to toggle one terminal of the second resistor 116 to either I_OUT or ground 186 based on a second most significant digit of the thermometric encoding of the four most significant bits of the input digital code. The third section 110 of the thermometric RDAC segment 102 includes a third resistor 120 and a pair of switches 122. The pair of switches 122 is configured to toggle one terminal of the third resistor 120 to either I_OUT or ground 186 based on a least significant digit of the thermometric encoding of the four most significant bits of the input digital code. Thus, the thermometric RDAC segment 102 is configured to connect more resistors in parallel to the I_OUT as a value of the four most significant bits of the input digital code increases.

[0011] The R-2R DAC segment 104 includes a section for each remaining bit of the input digital code (e.g., the 14 least significant bits of the input digital code). Each section of the R-2R DAC segment 104 includes a “rung” resistor, having a resistance R/2, a “leg” resistor, having a resistance R, and a pair of switches. The pair of switches is configured to toggle one terminal of the “leg” resistor between either I_OUT or ground 186. The leg resistor of each section is connected to the reference voltage through the rung resistor of the section and through rung resistors of sections corresponding to higher order bits than the section. The rung resistors are arranged in series such that a contribution of each section to total resistance is weighted based on an order of the bit corresponding to that section. The leg resistors of the R-2R DAC segment 104 are arranged in parallel. FIG. 1 depicts a first section 124 of the R-2R DAC segment 104, a second section 126 of the R-2R DAC segment 104, and a third section 128 of the R-2R DAC segment 104.

[0012] The first section 124 of the R-2R DAC segment 104 includes a pair of switches 130, a first rung resistor 132, and a first leg resistor 134. The first leg resistor 134 is connected to the reference voltage through the first rung resistor 132. The pair of switches 130 of the R-2R DAC segment 104 are configured to toggle one terminal of the first leg resistor 134 to either I_OUT or ground based on a most significant bit of the fourteen least significant bits of the input digital code. The second section 126 of the R-2R DAC segment 104 includes a pair of switches 136 and a second rung resistor 138 and a second leg resistor 140. The second rung resistor 138 is connected to the reference voltage in series with the first rung resistor 132. The pair of switches 136 of the R- 2R DAC segment 104 is configured to toggle one terminal of the second leg resistor 140 to either I_OUT or ground 186 based on a second most significant bit of the fourteen least significant bits of the input digital code. An effect of connecting the second resistor 140 to the I_OUT to the reference voltage is weighted by the first rung resistor 132 and the second rung resistor 138. The third section 128 of the R-2R DAC segment 104 includes a pair of switches 142 and a third rung resistor 144 and a third leg resistor 146. The third rung resistor 144 is connected to the reference voltage in series with the first rung resistor 132, the second rung resistor 138, and each other rung resistor in the R-2R DAC segment 104. The pair of switches 142 of the R-2R DAC segment 104 is configured to toggle one terminal of the third leg resistor 146 to either I_OUT or ground 186 based on a least significant bit of the input digital code. An effect of connecting the third resistor 146 to the I_OUT is weighted by each rung resistor in the R-2R DAC segment 104.

[0013] An OP AMP 182 receives the ground 186 at a first terminal and receives a combination of the I_OUT and an output of the OP AMP 182. A feedback resistor 184 is coupled across the output of the OP AMP 182. In operation, a controller sets the switches based on the input digital code to alter the total resistance of the MDAC 100 circuit. This causes the current at I_OUT to change based on the input digital code and the OP AMP 182 generates a voltage based on the current.

[0014] Generally speaking a DAC that includes a thermometric RDAC segment will experience approximately 2^(N-1) times less integral non-linearity (INL) caused by an operational amplifier OP AMP offset than an MDAC that includes only an R-2R segment, where N is the number of bits of an input digital code that are processed by the thermometric RDAC segment. For example, an 18-bit full R-2R DAC connected to an OP AMP with a 500 microvolt offset may experience 33.5 least significant bit INL, while the MDAC 100 of FIG. 1 connected to the OP AMP may experience 3.25 least significant bit (LSB) INL.

[0015] Thus, including a thermometric RDAC segment in an MDAC may reduce non-linearity. However, as explained above, the thermometric RDAC segment includes a resistor for each decimal value other than zero that can be represented by the 4 most significant bits. Accordingly, designing an MDAC with a thermometric RDAC segment that processes enough bits to meet a target INL may be prohibitively expensive or result in a device that requires too much space (e.g., has too large a footprint).

[0016] Referring to FIG. 2, a diagram of a hybrid MDAC 200 that includes a thermometric RDAC segment 202, a binary scaled RDAC segment 204, and an R-2R DAC segment 205 is shown. In the illustrated example, the hybrid MDAC 200 corresponds to an 18 bit DAC configured to receive an 18 bit digital code and to generate an analog signal based on the 18 bit digital code. The thermometric RDAC segment 202 is configured to operate on the four most significant bits of the 18 bit digital code, the R-2R DAC segment 205 is configured to operate on the ten least significant bits of the 18 bit digital code, and the binary scaled RDAC segment 204 is configured to operate on four bits in between the four most significant bits and the 10 least significant bits. The hybrid MDAC 200 may be arranged in alternative configurations that operate on digital codes having more or fewer bits. Similarly, each of the segments 202, 204, 206 may operate on a different number of bits than is shown in the illustrated example. The segments 202, 204, 206 are connected to a current output node I_OUT that is received by a first terminal of an operational amplifier (OP AMP) 282. A second terminal of the OP AMP receives ground 286. Each of the segments 202, 204, 205 includes switches and resistors. The resistors described herein may correspond to fixed resistors or variable resistors. The switches described herein may include mechanical switches, semiconductor devices (e.g., transistors), or a combination thereof. In addition, the R-2R DAC segment 205 may be replaced with a different type of resistor ladder segment (e.g., a string resistor ladder network).

[0017] While only four are shown for convenience, the thermometric RDAC segment 202 includes 15 sections (e.g., a section for each decimal value other than zero that can be represented by the 4 most significant bits). Each section of the thermometric RDAC segment 202 includes a resistor, having a resistance R, and a pair of switches. The pair of switches of each section is configured to toggle one terminal of resistance R to either current output node (I_OUT) 277 or ground 286. In some implementations, the pairs of switches may be replaced by single switches. The reference voltage source 201 may correspond to a direct current voltage source or an alternating current voltage source. The I_OUT 277 is connected to a first terminal of an operational amplifier 282. The sections of the thermometric RDAC segment 202 are arranged in parallel such that resisters of the sections are connected between the reference voltage source 201 and the I_OUT 277 in parallel when the corresponding switches are toggled to connect the reference voltage source 201 to the I_OUT 277. Accordingly, in the illustrated example, a conductance of the thermometric RDAC segment 102 varies between 0 and 15/R. FIG. 2 depicts a first section 206 of the thermometric RDAC segment 202, a second section 208 of the thermometric RDAC segment 202, and a third section 210 of the thermometric RDAC segment 202. The first section 206 corresponds to a first digit of a thermometric (e.g., unary) encoding of the four most significant bits of the input digital code, the second section 208 corresponds to a second digit of the thermometric encoding, and the third section 210 corresponds to a fifteenth digit of the thermometric encoding. While not depicted, the thermometric RDAC segment 202 further includes sections corresponding to the third to fourteenth digits of the thermometric encoding. Further, it should be noted that the thermometric RDAC segment may include a different number of sections in implementations in which the thermometric RDAC segment is configured to process a different number of most significant bits of an input digital code (e.g., a number of bits other than four, including zero).

[0018] The first section 206 of the thermometric RDAC segment 202 includes a pair of switches 214 and a first resistor 212 connected to a reference voltage. The pair of switches 214 is configured to toggle one terminal of the first resistor 212 to either I_OUT 277 or ground 286 based on a value of the first digit of the thermometric encoding of the four most significant bits of the input digital code. The second section 208 of the thermometric RDAC segment 202 includes a pair of switches 218 and a second resistor 216. The pair of switches 218 is configured to toggle one terminal of the second resistor 216 to either I_OUT 277 or ground 286 based on the second digit of the thermometric encoding. The third section 210 of the thermometric RDAC segment 202 includes a pair of switches 222 and a third resistor 220. The pair of switches 222 is configured to toggle one terminal of the third resistor 220 to either I_OUT 277 or ground 286 based on the fifteenth digit of the thermometric encoding. A thermometric encoding of a number N includes N ones (or N zeroes). For example, four bit binary number 0011 (e.g., 3 base ten) may be encoded as 000000000000111 (or 111111111111000). Thus, the thermometric RDAC segment 202 is configured to connect the reference voltage source 201 to the I_OUT 277 through a number of resistors equal to a value of the four most significant bits of the input digital code. In response to the value being 0, the thermometric RDAC segment 202 is configured to connect all resistors to ground. Because of this thermometric encoding, each section the thermometric RDAC segment 202 has an effect on total resistance at the I_OUT 277 based on a position of the section.

[0019] As described above, a DAC that includes a thermometric RDAC segment will experience approximately 2^(N-1) times less integral non-linearity (INL) caused by an operational amplifier OP AMP offset than an MDAC that includes only an R-2R segment. Accordingly, the thermometric RDAC segment 202 may reduce INL caused by an offset of the OP AMP 282 by approximately 2³ times as compared to an MDAC that includes only an R-2R DAC segment.

[0020] The binary scaled RDAC segment 204 includes a first section 224, a second section 226, a third section 228, and a fourth section 230. The first section 224 corresponds to a fifth bit of the input digital code, the second section 226 corresponds to a sixth bit of the input digital code, the third section 228 corresponds to a seventh bit of the input digital code, and the fourth section 230 correspond to an eighth bit of the input digital code. It should be noted that the binary scaled RDAC segment 204 may include a different number of sections in implementations in which the binary scaled RDAC segment 204 is configured to process a different number of bits of an input digital code (e.g., a number of bits other than four).

[0021] The first section 224 of the scaled RDAC segment 204 includes a pair of switches 234 and a first resistor 232 connected to the reference voltage. The pair of switches 234 configured to toggle one terminal of the first resistor 232 to either I_OUT 277 or ground 286 based on the first bit of the portion of the input digital code processed by the scaled RDAC segment 204. The second section 226 of the binary scaled RDAC segment 204 includes a pair of switches 238 and a second resistor 236. The pair of switches 238 is configured to toggle one terminal of the second resistor 236 to either I_OUT 277 or ground based on the second bit of the portion of the input digital code processed by the scaled RDAC segment 204. The third section 210 of the scaled RDAC segment 204 includes a pair of switches 242 and a third resistor 240. The pair of switches 242 is configured to toggle one terminal of the third resistor 240 to either I_OUT 277 or ground based on the third bit of the portion of the input digital code processed by the scaled RDAC segment 204. The fourth section of the scaled RDAC segment 204 includes a pair of switches 246 and a fourth resistor 244. The pair of switches 246 is configured to toggle one terminal of the fourth resistor 244 to either I_OUT 277 or ground based on the fourth bit of the portion of the input digital code processed by the scaled RDAC segment 204. The resistors 232, 236, 240, 244 of the binary scaled RDAC segment 204 are binary scaled such that each segment has a resistor with a resistance of 2^xR, where R is the resistance of the resistors of the thermometric RDAC segment 202 and x is the position of the bit processed by the segment in the portion of bits processed by the scaled RDAC segment 204. In the illustrated example, the first resistor 232 has a resistance of 2R (e.g., 2¹R), the second resistor 236 has a resistance of 4R (e.g., 2²R), the third resistor has a resistance of 8R (e.g., 2³R), and the fourth resistor 244 has a resistance of 16R (e.g., 2⁴R). Because the resistors are binary scaled, an effect of each bit processed by the binary scaled RDAC segment 204 on total resistance at I_OUT 277 is weighted based on bit position. Further, because the first section 224 of the binary scaled segment has a resistance (2R) twice the resistance (R) of the resistors of the thermometric RDAC segment 202, an effect of the bits processed by the binary scaled RDAC segment 204 on the total resistance at the I_OUT 277 is weighted relative to the bits of the thermometric RDAC segment 202.

[0022] An input referred voltage offset (V_os) of the OP AMP 282 results in a output voltage error given by

IS the equivalent output conductance of the MDAC 200, G_rtherm is the output conductance of the thermo metric coded DAC segment 202, is the output conductance of the binary scaled resistive

DAC segment 204, and G_R2_R is the output conductance of the R-2R DAC segment 205. The output conductance (e.g., conductance at the output) of the thermo-metric section 202 (G_rtherm) varies linearly with the number of X most significant bits (MSB) bits of the input code processed by the thermo-metric coded DAC segment (e.g., G_rtherm varies from 0,1/R,2/R,..,15/R as X varies from 0,1, 2,..., 15). Similarly the output conductance of the binary scaled RDAC segment 204

varies linearly with the number of Y intermediate bits processed by the binary scaled RDAC segment 204 (e.g., varies from 0, 1/(16R),1/(8R), 3/(16R),...,15/(16R)) as Y

varies from 0,1,2,..15). Hence the output voltage error due to V_os increases linearly with the number X MSB bits. An error in DAC output which increases linearly with code is classified as Gain error which can be easily calibrated and does not cause non-linearity. On the other hand, the output conductance

of the R2R segment 205 is a complex non-linear function of the Z least significant bits. Hence the voltage error due to V_os varies non-linearly with the Z LSB bits of the DAC resulting in increased INL/DNL. Thus the use the thermo-metric RDAC segment 202 and the binary scaled RDAC segment 204 results in less nonlinearity (INL and DNL) due to OP AMP offset as compared to a DAC which uses only the R-2R DAC segment 205.

[0023] Further, because output conductance of the binary scaled RDAC segment 204 and output conductance of the thermometric RDAC segment 202 have the same linear scaling, the binary scaled RDAC segment 204 provides the same improvement in nonlinearity caused by OP AMP offset as the thermometric RDAC segment 202 . That is, a DAC that includes a N bit thermometric RDAC segment and M bit binary scaled segment will experience approximately

times less integral non-linearity (INL) caused by an operational amplifier OP AMP offset than an MDAC that includes only an R-2R segment, where N is the number of bits processed by the thermometric segment and M is the number of bits processed by the binary scaled segment. [0024] The R-2R DAC segment 205 includes ten sections (e.g., one for each bit of the ten least significant bits of the input digital code processed by the R-2R DAC segment 205). For ease of explanation, FIG. 2 depicts four of the ten sections. These four sections include a first section 248, a second section 250, a third section 252, and a fourth section 254. The first section 248 corresponds to a ninth bit of the input digital code, the second section 250 corresponds to a tenth bit of the input digital code, the third section 252 corresponds to a seventeenth bit of the input digital code, and the fourth section 254 correspond to an eighteenth bit of the input digital code. While not depicted, the R-2R DAC segment 205 further includes sections corresponding to the eleventh to sixteenth bits. It should be noted that the R-2R DAC segment 205 may include a different number of sections in implementations in which the R-2R DAC segment 205 is configured to process a different number of bits of an input digital code (e.g., a number of bits other than 10).

[0025] The first section 248 of the R-2R DAC segment 205 includes a first “rung” resistor 256, a first leg resistor 258, and a pair of switches 260. The first leg resistor 258 is connected to the reference voltage source 201 in series with the first rung resistor 256 and in parallel with the resistors 212, 216, 220, 232, 236, 240, 244 of the thermometric RDAC segment 202 and the binary scaled RDAC segment 204. The pair of switches 260 is configured to toggle one terminal of the first leg resistor 258 to either I_OUT 277 or ground 286 based on the ninth bit of the input digital code. The first rung resistor 256 is a rescaling resistor and has a resistance equal to (2^y - 1)R, where y is the number of bits processed by the binary scaled RDAC segment 204. This ensures that input into the R-2R DAC segment 205 has a resistance of 2^yR. In the illustrated example, the first rung resistor 256 has a resistance of 15R (e.g., (2⁴ - 1)R). Accordingly, an effect of the bits processed by the R-2R DAC segment 205 on total resistance at the I_OUT 277 is weighted relative to the effects of the bits processed by the binary scaled RDAC segment 204 and the thermometric RDAC segment 202 by the first rung resistor 256 (e.g., the rescaling resistor). The first leg resistor 258 has a resistance of 2R.

[0026] The second section 250 of the R-2R DAC segment 205 includes a second rung resistor 262, a second leg resistor 264, and — a pair of switches 266. The second leg resistor 264 is connected to the reference voltage source 201 in series with the first rung resistor 256 and the second rung resistor 262 and in parallel with the first leg resistor 258 and the resistors 212, 216, 220, 232, 236, 240, 244 of the thermometric RDAC segment 202 and the binary scaled RDAC segment 204. The switches pair of switches 266 is configured to toggle one terminal of the second leg resistor 264 to either I_OUT 277 or ground 286 based on the tenth bit of the input digital code. The second rung resistor 262 has a resistance R and the second leg resistor 264 has a resistance of 2R. The sections of the R-2R DAC segment 205 between the second section 250 and the third section 252 each have a rung resistor, a leg resistor, and a switch arranged as shown with respect to the second section 250. The third section 252 of the R-2R DAC segment 205 includes a third rung resistor 268, a third leg resistor 270, and a pair of switches 272. The third leg resistor 270 is connected to the reference voltage source 201 in series with the first rung resistor 256, the second rung resistor 262, the third rung resistor 268, and rung resistors of the sections between the second section 250 and the third section 252 and in parallel with the first leg resistor 258, the second leg resistor 264, and the resistors 212, 216, 220, 232, 236, 240, 244 of the thermometric RDAC segment 202 and the binary scaled RDAC segment 204. The pair of switches 272 is configured to toggle one terminal of the third leg resistor 270 to either I_OUT 277 or ground 286 based on the seventeenth bit of the input digital code. The third rung resistor 262 has a resistance R and the third leg resistor 270 has a resistance of 2R. The sections of the R-2R DAC segment 205 are arranged such that the rung resistors are arranged in series and the leg resistors are in parallel. The series of rung resistors causes an effect of a switch of one of the sections of the R-2R DAC 205 coupling the reference voltage source 201 to the I_OUT 277 to be weighted based on a position of the section (e.g., corresponding to a bit position associated with the section).

[0027] The fourth section 254 includes a fourth rung resistor 269, a fourth leg resistor 274 and a pair of switches 276. The fourth leg resistor 274 is connected to the reference voltage source 201 in series with the first rung resistor 256, the second rung resistor 262, the third rung resistor 268, the fourth rung resistor 269, and rung resistors of the sections between the second section 250 and the third section 252 and in parallel with the first leg resistor 258, the second leg resistor 264, the third leg resistor 270, and the resistors 212, 216, 220, 232, 236, 240, 244 of the thermometric RDAC segment 202 and the binary scaled RDAC segment 204. The pair of switches 276 is configured to toggle one terminal of the fourth leg resistor 274 to either I_OUT 277 or ground 286 based on the eighteenth bit of the input digital code.

[0028] The reference voltage source 201 is further connected to a ground 280 through a ground resistor 278 and the rung resistors (e.g., 256, 262, 268) of the R-2R DAC segment 205. The ground resistor 278 has a resistance of 2R.

[0029] The OP AMP 282 is configured to receive a sum of current flowing through the I_OUT 277 and a feedback current at the first terminal and to receive the ground 286 at a second terminal. The OP AMP 282 is configured to generate a voltage output based on input received at the first and second terminals. An output of the OP AMP 282 is connected to a feedback resistor 284. The I_OUT 277 is connected to an output of the feedback resistor 284 so that current at the I_OUT 277 and current from the feedback resistor 284 are combined. Accordingly, a feedback loop between an output of the OP AMP 282 and input received at the first terminal is established.

[0030] In operation, the hybrid MDAC 200 receives an input digital code (e.g., an input digital signal) that includes 18 bits. The hybrid MDAC 200 converts the four most significant bits to a thermometric representation. For example, the hybrid MDAC 200 may include thermometric logic (not shown) that may include hardware, software, or a combination thereof configured to convert a binary number into a thermometric representation. The hybrid MDAC 200 applies each digit of the thermometric representation of the four most significant bits to a corresponding one of the switches of the thermometric RDAC segment 202. The hybrid MDAC 200 further applies each of the next four most significant bits to a corresponding one of the switches of the binary scaled RDAC segment 204 and applies each of the ten least significant bits to a corresponding one of the switches of the R-2R DAC segment 205. The switches of the hybrid MDAC 200 connect the resistors to either I_OUT 277 or ground 286 based on the bits received. Accordingly, resistance (and current) at the I_OUT 277 is set based on the input digital code. As described above, the impact on the resistance at the I_OUT 277 of each bit is weighted based on the structures of the different DAC segments 202, 204, 205. Accordingly, a current generated at the I_OUT 277 is based on the input code. This OP AMP 282 generates an output voltage based on the current and a feedback current through the feedback resistor 284 received at the first terminal and based on the ground 286 received at the second terminal.

[0031] Because the thermometric RDAC segment 202 and the binary scaled RDAC segment 204 reduce INL caused by the OP AMP 282, the hybrid MDAC 200 may experience less INL as compared to a strictly R-2R DAC. Further, the hybrid MDAC 200 may be smaller than another DAC that achieves comparable INL reduction using a strictly thermometric solution because the binary scaled RDAC segment 204 includes fewer resistors as compared to a thermometric segment that processes the same number of bits. Further, as described above, other implementations of the hybrid MDAC 200 include different numbers of bits processed by the thermometric RDAC segment 202 and the binary scaled RDAC segment 204. The number of bits processed by each of the thermometric RDAC segment 202 and the binary scaled RDAC segment 204 may be selected by a DAC designer or a DAC design system based on a target INL, an offset of a designated OP AMP, or a combination thereof. It should be noted that other configurations of the DAC 200 are possible. For example, the DAC 200 may not include the R-2R DAC segment 205 in some implementations. In such implementations, the bits of an input digital code are split between the thermometric RDAC segment 202 and the binary scaled RDAC segment 204. Similarly, the DAC 200 may not include the thermometric RDAC segment 202. In such implementations, the bits of an input digital code are split between the binary scaled RDAC segment 204 and the R-2R DAC segment 205. Further, the DAC 200 may not include both the thermometric RDAC segment 202 and the R-2R DAC segment 205. In such implementations, each bit of an input digital code may be processed by the binary scaled RDAC segment 204.

[0032] Referring to FIG. 3, a diagram illustrating another hybrid MDAC 300 is shown. The hybrid MDAC 300 includes the same components as the hybrid MDAC 200 except the hybrid MDAC 200 includes an R-2R DAC segment 304 in place of the R-2R DAC segment 205. The R- 2R DAC segment 304 differs from the R-2R DAC segment 205 in that the R-2R DAC segment 304 does not include a rescaling resistor. Rather, each leg resistor of the R-2R DAC segment 304 has a resistance equal to a resistance of the resistor of the binary scaled RDAC 204 associated with the last bit of the section portion of the input binary code. In the illustrated example, each leg resistor has a resistance of 16R. Further, each rung resistor of the R-2R DAC 304 has a resistance of one half the resistance of the leg resistors. In the illustrated example, each rung resistor has a resistance of 8R. FIG. 3 depicts a first section 302 including a first rung resistor 312 and a first leg resistor 314 in place of the first rung resistor 256 and the first leg resistor 258. FIG. 3 further depicts a second section 306 including a second rung resistor 306 and a second leg resistor 318 in place of the second rung resistor 262 and the second leg resistor 264. FIG. 3 further depicts a third section 308 including a third rung resistor 320 and a third leg resistor 322 in place of the third rung resistor 268 and the third leg resistor 270. FIG. 3 further depicts a fourth section 310 including a fourth rung resistor 369, a fourth leg resistor 324 in place of the fourth leg resistor 274. As shown, each of the rung resistors 312, 316, 320, 369 has the same resistance (e.g., 8R). Because resistances of the leg resistors 314, 318, 322, 324 are based on a resistance of the resistor 244 (e.g., the resistor associated with the last bit processed by the binary scaled RDAC segment 204), no rescaling resistor is necessary. In the example of FIG. 3, the ground resistor 278 is replaced with a ground resistor 378 having a resistance (16R) equal to resistances of the leg resistors of the R-2R DAC segment 304. Accordingly, FIG. 3 illustrates that a hybrid MDAC may not include a rescaling resistor to rescale resistance.

[0033] The term “couple” is used throughout the specification. The term may cover connections, communications, or signal paths that enable a functional relationship consistent with the description of the present disclosure. For example, if device A generates a signal to control device B to perform an action, in a first example device A is coupled to device B, or in a second example device A is coupled to device B through intervening component C if intervening component C does not substantially alter the functional relationship between device A and device B such that device B is controlled by device A via the control signal generated by device A.”

Claims

CLAIMS What is claimed is:

1. A digital to analog converter (DAC) device comprising: a thermometric DAC segment responsive to a thermometric encoding of a first portion of a digital code, wherein the thermometric DAC segment includes a plurality of first resistors connected to a reference voltage in parallel, wherein the thermometric DAC segment is configured to selectively connect the first plurality of resistors to a current output node based on the thermometric encoding; a binary scaled DAC segment responsive to a second portion of the digital code, wherein the binary scaled DAC segment includes a plurality of second resistors connected to the reference voltage in parallel and having binary scaled resistances, and wherein the binary scaled DAC segment is configured to selectively connect the plurality of second resistors to the current output node based on the second portion of the digital code; and a resistor ladder DAC segment responsive to a third portion of the digital code, wherein the resistor ladder DAC segment includes an R-2R resistor ladder, and wherein the resistor ladder DAC segment is configured to selectively connect resistors of the R-2R resistor ladder to the current output node based on the third portion of the digital code.

2. The DAC device of claim 1, wherein the resistor ladder DAC segment includes a rung resistor having a resistance equal to R and a rescaling rung resistor having a resistance of (2^y - 1)R, wherein y is a number of bits in the second portion of the digital code.

3. The DAC device of claim 1, further comprising an operational amplifier (OP AMP), wherein the current output node is connected to a first terminal of the OP AMP and a ground is connected to a second terminal of the OP AMP.

4. The DAC device of claim 3, further comprising a feedback resistor connected to an output of the OP AMP and to the first terminal of the OP AMP.

5. The DAC device of claim 1, wherein the first portion of the digital code corresponds to x most significant bits of the digital code, wherein the third portion of the digital code corresponds to y least significant bits of the digital code, and wherein the second portion of the digital code corresponds to z bits of the digital code between the x most significant bits and the y least significant bits.

6. The DAC device of claim 5, wherein x equals 4, y equals 10, and z equals 4.

7. A digital to analog converter (DAC) device comprising: a thermometric DAC segment responsive to a thermometric encoding of a first portion of a digital code; and a binary scaled DAC segment responsive to a second portion of the digital code, wherein the binary scaled DAC segment includes a plurality of resistors connected to a reference voltage in parallel and having binary scaled resistances, and wherein the binary scaled DAC segment is configured to selectively connect the plurality of resistors to a current output node based on the second portion of the digital code.

8. The DAC device of claim 7, further comprising an operational amplifier (OP AMP), wherein the current output node is connected to a first terminal of the OP AMP and a ground is connected to a second terminal of the OP AMP.

9. The DAC device of claim 8, further comprising a feedback resistor connected to an output of the OP AMP and to the first terminal of the OP AMP.

10. The DAC device of claim 7, wherein the first portion of the digital code corresponds to x most significant bits of the digital code, and wherein the second portion of the digital code corresponds to z bits of the digital code following the x most significant bits.

11. The DAC device of claim 7, wherein the thermometric DAC segment includes a plurality of first resistors connected to a reference voltage in parallel, the plurality of first resistors including a resistor corresponding to each digit of the thermometric encoding, wherein the thermometric DAC segment is configured to selectively connect the first plurality of resistors to a current output node based on the thermometric encoding.

12. A digital to analog converter (DAC) device comprising: a thermometric DAC segment responsive to a thermometric encoding of a first portion of a digital code, the thermometric DAC segment comprising: a first resistor connected to a reference voltage source; a first pair of switches configured to connect the first resistor to one of a ground and a current output node responsive to a first digit of the thermometric encoding of the first portion of the digital code; a second resistor connected to the reference voltage source in parallel with the first resistor; and a second pair of switches configured to connect the second resistor to one of the ground and the current output node responsive to a second digit of the thermometric encoding of the first portion of the digital code; a binary scaled DAC segment responsive to a second portion of the digital code, the binary scaled DAC segment including: a third resistor connected to the reference voltage source in parallel with the first resistor and the second resistor; a third pair of switches configured to connect the third resistor to one of the ground and the current output node responsive to a first bit of the second portion of the digital code; a fourth resistor connected to the reference voltage source in parallel with the first resistor, the second resistor, and the third resistor, wherein a resistance of the fourth resistor is twice a resistance of the third resistor; and a fourth pair of switches configured to connect the fourth resistor to one of the ground and the current output node responsive to a second bit of the second portion of the digital code; and a resistor ladder DAC segment responsive to a third portion of the digital code, the resistor ladder DAC segment including: a first rung resistor connected to the reference voltage source; a first leg resistor connected to the reference voltage source in series with the first rung resistor and in parallel with the first resistor, the second resistor, the third resistor, and the fourth resistor; a fifth pair of switches configured to connect the first leg resistor to one of the ground and the current output node responsive to a first bit of the third portion of the digital code; a second rung resistor connected to the reference voltage source in series with the first rung resistor; a second leg resistor connected to the reference voltage source in series with the second rung resistor and the first rung resistor and in parallel with the first resistor, the second resistor, the third resistor, the fourth resistor, and the first leg resistor; and a sixth pair of switches configured to connect the second leg resistor to one of the ground and the current output node responsive to a second bit of the third portion of the digital code.

13. The DAC device of claim 12, wherein a resistance of the second leg ladder resistor is twice a resistance of the second rung resistor.

14. The DAC device of claim 13, wherein a resistance of the first rung resistor is equal to (2^y-l)R, wherein y is a number of bits in the second portion of the digital code, and wherein R is the resistance of the second rung resistor.

15. The DAC device of claim 12, wherein the binary scaled DAC segment further includes: a fifth resistor connected to the reference voltage source in parallel with the first resistor, the second resistor, the third resistor, the fourth resistor, the first leg resistor, and the second leg resistor, wherein a resistance of the fifth resistor is twice the resistance of the fourth resistor; a seventh pair of switches configured to connect the fifth resistor to one of the ground and the current output node responsive to a third bit of the second portion of the digital code; a sixth resistor connected to the reference voltage source in parallel with the first resistor, the second resistor, the third resistor, the fourth resistor, the fifth resistor, the first leg resistor, and the second leg resistor, wherein a resistance of the sixth resistor is twice the resistance of the fifth resistor; and an eighth pair of switches configured to connect the sixth resistor to one of the ground and the current output node responsive to a fourth bit of the second portion of the digital code.

16. The DAC device of claim 12, wherein the first portion of the digital code corresponds to x most significant bits of the digital code, wherein the third portion of the digital code corresponds to y least significant bits of the digital code, and wherein the second portion of the digital code corresponds to z bits of the digital code between the x most significant bits and the y least significant bits.

17. The DAC device of claim 16, wherein x equals 4, y equals 10, and z equals 4.

18. The DAC device of claim 12, further comprising an operational amplifier (OP AMP), wherein a first terminal of the OP AMP is connected to the current output node and a second terminal of the OP AMP is connected to the ground.

19. The DAC device of claim 12, wherein the fourth resistor corresponds to a final bit of the second portion, and wherein the first leg resistor and the second leg resistor have resistances equal to a resistance of the fourth resistor.

20. The DAC device of claim 19, wherein resistances of the first rung resistor and the second rung resistor are equal to half the resistance of the fourth resistor.

21. A digital to analog converter (DAC) device comprising: a binary scaled DAC segment responsive to a first portion of a digital code, wherein the binary scaled DAC segment includes a plurality of resistors connected to a reference voltage in parallel and having binary scaled resistances, and wherein the binary scaled DAC segment is configured to selectively connect the plurality of resistors to a current output node based on the second portion of the digital code; and a resistor ladder DAC segment responsive to a second portion of the digital code, wherein the resistor ladder DAC segment includes an R-2R resistor ladder, and wherein the resistor ladder DAC segment is configured to selectively connect resistors of the R-2R resistor ladder to the current output node based on the third portion of the digital code.