JP4477937B2 - タップ・エレメントを備えた電子回路制御エレメント - Google Patents
タップ・エレメントを備えた電子回路制御エレメント Download PDFInfo
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- 210000000746 body region Anatomy 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 8
- 239000003989 dielectric material Substances 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 2
- 235000012239 silicon dioxide Nutrition 0.000 claims 1
- 239000000377 silicon dioxide Substances 0.000 claims 1
- 238000004804 winding Methods 0.000 description 13
- 230000005669 field effect Effects 0.000 description 5
- 238000012546 transfer Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000013459 approach Methods 0.000 description 3
- 239000002800 charge carrier Substances 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
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- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
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- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
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- H02M3/33546—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only of the forward type with automatic control of the output voltage or current
- H02M3/33553—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only of the forward type with automatic control of the output voltage or current with galvanic isolation between input and output of both the power stage and the feedback loop
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- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
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Description
Claims (26)
- 第1のメイン端子と、第2のメイン端子と、制御端子と、タップ端子とを有し、前記第1および第2のメイン端子の一方がソース領域に接続され、前記第1および第2のメイン端子の他方がドレイン領域に接続され、前記タップ端子がタップ領域に接続されたパワー・トランジスタと、
前記パワー・トランジスタの前記制御端子と前記タップ端子に結合された制御回路とを備え、
前記第1のメイン端子と前記第2のメイン端子の間の電圧がピンチ・オフ電圧未満である場合、前記パワー・トランジスタの前記タップ端子と前記第2のメイン端子の間の電圧が、前記第1のメイン端子と前記第2のメイン端子の間に流れる電流に実質的に比例し、
また、前記第1のメイン端子と前記第2のメイン端子の間の電圧が前記ピンチ・オフ電圧より大きい場合、前記パワー・トランジスタの前記タップ端子と前記第2のメイン端子の間の電圧は実質的に一定であり、かつ、前記第1のメイン端子と前記第2のメイン端子の間の電圧より小さい、電子回路制御エレメント。 - 前記タップ端子が前記制御回路に電力を提供するため結合された、請求項1に記載の電子回路制御エレメント。
- 前記タップ端子が前記制御回路の電流制限機能に結合された、請求項1に記載の電子回路制御エレメント。
- 前記タップ端子が前記制御回路のライン・センス機能に結合された、請求項1に記載の電子回路制御エレメント。
- 前記パワー・トランジスタと前記制御回路が単一パッケージ中にまとめて実装された、請求項1に記載の電子回路制御エレメント。
- 前記パワー・トランジスタが、前記制御端子で前記制御回路から受け取る制御信号に応答して、前記第1のメイン端子と前記第2のメイン端子の間で電流をスイッチするようになされた、請求項1に記載の電子回路制御エレメント。
- 請求項1〜6のいずれかに記載の電子回路制御エレメントを備えた、電源調整器。
- 前記制御回路に電力を提供するため、前記パワー・トランジスタの前記タップ端子に提供される電流が、前記パワー・トランジスタの前記第1と第2のメイン端子のうちの少なくとも1つから引き出される、請求項1に記載の電子回路制御エレメント。
- 前記タップ端子と前記第2のメイン端子の間の電圧が、前記第1のメイン端子と前記第2のメイン端子の間に流れる電流に実質的に比例し、前記タップ端子と前記第2のメイン端子の間の電圧が前記制御回路の電流制限機能に入力信号を提供している、請求項1に記載の電子回路制御エレメント。
- 前記タップ端子の電圧が、前記制御回路のライン・センス機能に入力信号を提供するため結合された、請求項1に記載の電子回路制御エレメント。
- 前記パワー・トランジスタが、前記制御端子で前記制御回路から受け取る制御信号に応答して、前記第1のメイン端子と前記第2のメイン端子の間で電流をスイッチするようになされた、請求項8〜10のいずれかに記載の電子回路制御エレメント。
- 前記パワー・トランジスタは、高電圧トランジスタを備え、
前記高電圧トランジスタは、
第1の伝導形式の前記ドレイン領域と、
前記第1の伝導形式の前記ソース領域と、
前記第1の伝導形式の前記タップ領域と、
前記ソース領域と隣接した、前記第1の伝導形式と反対の第2の伝導形式のボディ領域と、
前記ドレイン領域から前記ボディ領域へ延びた前記第1の伝導形式のドリフト領域と、
前記ドレイン領域から前記タップ領域へ延びた前記第1の伝導形式のタップ・ドリフト領域と、
前記ボディ領域と隣接した絶縁ゲートとを含む、請求項1に記載の電子回路制御エレメント。 - 前記高電圧トランジスタは、前記ドリフト領域と前記タップ・ドリフト領域の間に配置された、前記第2の伝導形式の半導体領域をさらに含む、請求項12に記載の電子回路制御エレメント。
- 前記高電圧トランジスタは、前記ドリフト領域と前記タップ・ドリフト領域の間に配置されたフィールド・プレートをさらに含む、請求項12に記載の電子回路制御エレメント。
- 前記ドレイン領域と前記ソース領域の間の電圧がピンチ・オフ電圧未満である場合、前記タップ領域と前記ソース領域の間の電圧が、前記ドレイン領域と前記ソース領域の間の電圧に比例する、請求項12に記載の電子回路制御エレメント。
- 前記ドレイン領域と前記ソース領域の間の電圧の差がピンチ・オフ電圧より大きい場合、前記タップ・ドリフト領域が、前記タップ領域と前記ソース領域の間の前記電圧の差をピンチ・オフするように構成された、請求項12に記載の電子回路制御エレメント。
- 前記ドレイン領域と前記ソース領域の間の電圧の差がピンチ・オフ電圧より大きい場合、前記タップ領域と前記ソース領域の間の電圧が実質的に一定である、請求項12に記載
の電子回路制御エレメント。 - 前記高電圧トランジスタは、
前記ソース領域に結合されたソース電極と、
前記ドレイン領域に結合されたドレイン電極と、
前記絶縁ゲートに結合されたゲート電極とをさらに含む、請求項12に記載の電子回路制御エレメント。 - 前記高電圧トランジスタは、
前記ソース領域と前記フィールド・プレートに結合されたソース電極と、
前記ドレイン領域に結合されたドレイン電極と、
前記絶縁ゲートに結合されたゲート電極とをさらに含む、請求項14に記載の電子回路制御エレメント。 - 前記第1の伝導形式がN型半導体材料からなり、前記第2の伝導形式がP型半導体材料からなる、請求項12に記載の電子回路制御エレメント。
- 前記第1の伝導形式がN型半導体材料から、また、前記第2の伝導形式がP型半導体材料からなり、前記フィールド・プレートが二酸化ケイ素からなる誘電材料中に配置された、請求項14に記載の電子回路制御エレメント。
- 前記タップ・ドリフト領域が、前記ドリフト領域と実質的に類似した構造とドーピング・プロファイルを有する、請求項12に記載の電子回路制御エレメント。
- 前記タップ・ドリフト領域が、前記ドリフト領域とは異なる構造を有する、請求項12に記載の電子回路制御エレメント。
- 前記タップ・ドリフト領域が、前記ドリフト領域とは異なる寸法を有する、請求項12に記載の電子回路制御エレメント。
- 前記タップ・ドリフト領域が、前記ドリフト領域とは異なるドーピング・プロファイルを有する、請求項12に記載の電子回路制御エレメント。
- 前記パワー・トランジスタは、前記タップ領域と、前記ドレイン領域および前記ソース領域のいずれかとの間に、タップ・ドリフト領域をさらに含む、請求項1に記載の電子回路制御エレメント。
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US7002398B2 (en) * | 2004-07-08 | 2006-02-21 | Power Integrations, Inc. | Method and apparatus for controlling a circuit with a high voltage sense device |
US8385088B2 (en) * | 2010-12-06 | 2013-02-26 | Power Integrations, Inc. | Method and apparatus for implementing an unregulated dormant mode with output reset in a power converter |
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2003
- 2003-05-27 US US10/446,312 patent/US6865093B2/en not_active Expired - Lifetime
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2004
- 2004-05-19 EP EP10176318.3A patent/EP2256577B1/en not_active Expired - Fee Related
- 2004-05-19 DE DE602004017669T patent/DE602004017669D1/de not_active Expired - Lifetime
- 2004-05-19 EP EP04252903A patent/EP1486844B1/en not_active Expired - Fee Related
- 2004-05-19 EP EP07024069A patent/EP1903417B1/en not_active Expired - Fee Related
- 2004-05-25 JP JP2004154403A patent/JP4477937B2/ja not_active Expired - Fee Related
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2005
- 2005-01-27 US US11/045,428 patent/US7102900B2/en not_active Expired - Fee Related
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2006
- 2006-07-28 US US11/495,382 patent/US7333351B2/en not_active Expired - Fee Related
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2008
- 2008-01-02 US US11/968,599 patent/US7636247B2/en not_active Expired - Fee Related
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2009
- 2009-11-25 US US12/626,466 patent/US8144484B2/en not_active Expired - Fee Related
- 2009-12-14 JP JP2009283284A patent/JP5214580B2/ja not_active Expired - Fee Related
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2012
- 2012-02-17 US US13/399,755 patent/US8264858B2/en not_active Expired - Fee Related
- 2012-08-09 US US13/571,209 patent/US8611108B2/en not_active Expired - Fee Related
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2013
- 2013-12-02 US US14/094,058 patent/US20140177285A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US7636247B2 (en) | 2009-12-22 |
US8144484B2 (en) | 2012-03-27 |
US20080101098A1 (en) | 2008-05-01 |
US20140177285A1 (en) | 2014-06-26 |
EP1903417A2 (en) | 2008-03-26 |
US8264858B2 (en) | 2012-09-11 |
EP1903417B1 (en) | 2012-08-08 |
JP2010063358A (ja) | 2010-03-18 |
US20040240233A1 (en) | 2004-12-02 |
EP1486844B1 (en) | 2008-11-12 |
US20100072540A1 (en) | 2010-03-25 |
US20060268584A1 (en) | 2006-11-30 |
EP1486844A2 (en) | 2004-12-15 |
EP1903417A3 (en) | 2009-01-21 |
DE602004017669D1 (de) | 2008-12-24 |
EP2256577B1 (en) | 2015-03-18 |
EP2256577A1 (en) | 2010-12-01 |
US20050151484A1 (en) | 2005-07-14 |
JP2004357496A (ja) | 2004-12-16 |
US7333351B2 (en) | 2008-02-19 |
US20120314453A1 (en) | 2012-12-13 |
EP1486844A3 (en) | 2005-02-16 |
US6865093B2 (en) | 2005-03-08 |
JP5214580B2 (ja) | 2013-06-19 |
US20120146141A1 (en) | 2012-06-14 |
US7102900B2 (en) | 2006-09-05 |
US8611108B2 (en) | 2013-12-17 |
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