JP4427777B2 - 半導体基板の製造方法 - Google Patents

半導体基板の製造方法 Download PDF

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Publication number
JP4427777B2
JP4427777B2 JP2002381896A JP2002381896A JP4427777B2 JP 4427777 B2 JP4427777 B2 JP 4427777B2 JP 2002381896 A JP2002381896 A JP 2002381896A JP 2002381896 A JP2002381896 A JP 2002381896A JP 4427777 B2 JP4427777 B2 JP 4427777B2
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Japan
Prior art keywords
wafer
active layer
heat treatment
bonded
peeling
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Expired - Fee Related
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JP2002381896A
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Japanese (ja)
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JP2004214400A (ja
JP2004214400A5 (enExample
Inventor
昭彦 遠藤
信之 森本
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Sumco Corp
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Sumco Corp
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Publication of JP2004214400A5 publication Critical patent/JP2004214400A5/ja
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JP2002381896A 2002-12-27 2002-12-27 半導体基板の製造方法 Expired - Fee Related JP4427777B2 (ja)

Priority Applications (1)

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JP2002381896A JP4427777B2 (ja) 2002-12-27 2002-12-27 半導体基板の製造方法

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JP2002381896A JP4427777B2 (ja) 2002-12-27 2002-12-27 半導体基板の製造方法

Publications (3)

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JP2004214400A JP2004214400A (ja) 2004-07-29
JP2004214400A5 JP2004214400A5 (enExample) 2005-09-15
JP4427777B2 true JP4427777B2 (ja) 2010-03-10

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JP2002381896A Expired - Fee Related JP4427777B2 (ja) 2002-12-27 2002-12-27 半導体基板の製造方法

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Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006261591A (ja) * 2005-03-18 2006-09-28 Fujitsu Ltd 絶縁ゲート型半導体装置の製造方法
JP4869622B2 (ja) * 2005-04-19 2012-02-08 信越半導体株式会社 貼り合わせウエーハの製造方法及びそれに用いる剥離用治具
US7767583B2 (en) * 2008-03-04 2010-08-03 Varian Semiconductor Equipment Associates, Inc. Method to improve uniformity of chemical mechanical polishing planarization
US8741740B2 (en) 2008-10-02 2014-06-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
JP2010187373A (ja) * 2009-01-19 2010-08-26 Ngk Insulators Ltd 複合基板及びそれを用いた弾性波デバイス
KR101661361B1 (ko) * 2010-01-14 2016-09-29 엔지케이 인슐레이터 엘티디 복합 기판, 및 그것을 이용한 탄성 표면파 필터와 탄성 표면파 공진기
CN106960811A (zh) * 2016-01-12 2017-07-18 沈阳硅基科技有限公司 一种soi硅片的制备方法
JP7318580B2 (ja) * 2020-03-30 2023-08-01 信越半導体株式会社 Soiウェーハの製造方法

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JP2004214400A (ja) 2004-07-29

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