JP4330821B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP4330821B2
JP4330821B2 JP2001203647A JP2001203647A JP4330821B2 JP 4330821 B2 JP4330821 B2 JP 4330821B2 JP 2001203647 A JP2001203647 A JP 2001203647A JP 2001203647 A JP2001203647 A JP 2001203647A JP 4330821 B2 JP4330821 B2 JP 4330821B2
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Japan
Prior art keywords
chip
wafer
manufacturing
sealing material
bumps
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Expired - Fee Related
Application number
JP2001203647A
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English (en)
Japanese (ja)
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JP2003017513A5 (ko
JP2003017513A (ja
Inventor
真也 田久
哲也 黒澤
美佳 桐谷
晃成 高野
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Toshiba Corp
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Toshiba Corp
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Publication date
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Priority to JP2001203647A priority Critical patent/JP4330821B2/ja
Priority to TW091114071A priority patent/TW546813B/zh
Priority to KR10-2002-0038237A priority patent/KR100481658B1/ko
Priority to US10/187,629 priority patent/US6777313B2/en
Publication of JP2003017513A publication Critical patent/JP2003017513A/ja
Publication of JP2003017513A5 publication Critical patent/JP2003017513A5/ja
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Publication of JP4330821B2 publication Critical patent/JP4330821B2/ja
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    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Dicing (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2001203647A 2001-07-04 2001-07-04 半導体装置の製造方法 Expired - Fee Related JP4330821B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2001203647A JP4330821B2 (ja) 2001-07-04 2001-07-04 半導体装置の製造方法
TW091114071A TW546813B (en) 2001-07-04 2002-06-26 Manufacturing method of semiconductor device for die reinforcement during picking using sealing material
KR10-2002-0038237A KR100481658B1 (ko) 2001-07-04 2002-07-03 밀봉재를 이용하여 픽업시의 칩의 보강을 행하는 반도체장치의 제조 방법
US10/187,629 US6777313B2 (en) 2001-07-04 2002-07-03 Semiconductor device manufacturing method for reinforcing chip by use of seal member at pickup time

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001203647A JP4330821B2 (ja) 2001-07-04 2001-07-04 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2003017513A JP2003017513A (ja) 2003-01-17
JP2003017513A5 JP2003017513A5 (ko) 2005-10-27
JP4330821B2 true JP4330821B2 (ja) 2009-09-16

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JP2001203647A Expired - Fee Related JP4330821B2 (ja) 2001-07-04 2001-07-04 半導体装置の製造方法

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US (1) US6777313B2 (ko)
JP (1) JP4330821B2 (ko)
KR (1) KR100481658B1 (ko)
TW (1) TW546813B (ko)

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* Cited by examiner, † Cited by third party
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US6794751B2 (en) * 2001-06-29 2004-09-21 Intel Corporation Multi-purpose planarizing/back-grind/pre-underfill arrangements for bumped wafers and dies
US6649445B1 (en) * 2002-09-11 2003-11-18 Motorola, Inc. Wafer coating and singulation method
US8026126B2 (en) * 2002-11-27 2011-09-27 Asm Assembly Automation Ltd Apparatus and method for thin die detachment
JP4599075B2 (ja) * 2003-03-26 2010-12-15 株式会社東芝 半導体製造装置及び半導体装置の製造方法
SG116533A1 (en) * 2003-03-26 2005-11-28 Toshiba Kk Semiconductor manufacturing apparatus and method of manufacturing semiconductor device.
JP2004311576A (ja) 2003-04-03 2004-11-04 Toshiba Corp 半導体装置の製造方法
JP2004335916A (ja) * 2003-05-12 2004-11-25 Toshiba Corp 半導体装置の製造方法
JP4342832B2 (ja) * 2003-05-16 2009-10-14 株式会社東芝 半導体装置およびその製造方法
JP2005019667A (ja) * 2003-06-26 2005-01-20 Disco Abrasive Syst Ltd レーザ光線を利用した半導体ウエーハの分割方法
JP4406300B2 (ja) 2004-02-13 2010-01-27 株式会社東芝 半導体装置及びその製造方法
JP4515129B2 (ja) * 2004-03-26 2010-07-28 シャープ株式会社 半導体装置の製造方法
KR100574983B1 (ko) 2004-07-06 2006-05-02 삼성전자주식회사 반도체소자 제조를 위한 반도체웨이퍼 처리방법
US20060019468A1 (en) * 2004-07-21 2006-01-26 Beatty John J Method of manufacturing a plurality of electronic assemblies
US8124455B2 (en) * 2005-04-02 2012-02-28 Stats Chippac Ltd. Wafer strength reinforcement system for ultra thin wafer thinning
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