JP4174102B2 - スルーレート制御装置 - Google Patents

スルーレート制御装置 Download PDF

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Publication number
JP4174102B2
JP4174102B2 JP18114898A JP18114898A JP4174102B2 JP 4174102 B2 JP4174102 B2 JP 4174102B2 JP 18114898 A JP18114898 A JP 18114898A JP 18114898 A JP18114898 A JP 18114898A JP 4174102 B2 JP4174102 B2 JP 4174102B2
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Japan
Prior art keywords
circuit
output
input
slew rate
terminal
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP18114898A
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English (en)
Japanese (ja)
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JPH11150467A5 (enExample
JPH11150467A (ja
Inventor
ジミー サンヲ イクオ
ネジャト マーヤー
タカノ ヒロシ
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ソニー エレクトロニクス インク
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Publication of JPH11150467A5 publication Critical patent/JPH11150467A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
JP18114898A 1997-06-27 1998-06-26 スルーレート制御装置 Expired - Fee Related JP4174102B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/884438 1997-06-27
US08/884,438 US5977790A (en) 1997-06-27 1997-06-27 Apparatus and method of providing a programmable slew rate control output driver

Publications (3)

Publication Number Publication Date
JPH11150467A JPH11150467A (ja) 1999-06-02
JPH11150467A5 JPH11150467A5 (enExample) 2005-10-20
JP4174102B2 true JP4174102B2 (ja) 2008-10-29

Family

ID=25384632

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18114898A Expired - Fee Related JP4174102B2 (ja) 1997-06-27 1998-06-26 スルーレート制御装置

Country Status (3)

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US (1) US5977790A (enExample)
JP (1) JP4174102B2 (enExample)
KR (1) KR100511824B1 (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3076300B2 (ja) * 1998-04-20 2000-08-14 日本電気アイシーマイコンシステム株式会社 出力バッファ回路
JP3152204B2 (ja) * 1998-06-02 2001-04-03 日本電気株式会社 スルーレート出力回路
US6356102B1 (en) 1998-11-13 2002-03-12 Integrated Device Technology, Inc. Integrated circuit output buffers having control circuits therein that utilize output signal feedback to control pull-up and pull-down time intervals
US6242942B1 (en) 1998-11-13 2001-06-05 Integrated Device Technology, Inc. Integrated circuit output buffers having feedback switches therein for reducing simultaneous switching noise and improving impedance matching characteristics
US6091260A (en) * 1998-11-13 2000-07-18 Integrated Device Technology, Inc. Integrated circuit output buffers having low propagation delay and improved noise characteristics
US6288563B1 (en) 1998-12-31 2001-09-11 Intel Corporation Slew rate control
US6351172B1 (en) * 2000-02-29 2002-02-26 Dmel Inc. High-speed output driver with an impedance adjustment scheme
US6636069B1 (en) 2000-03-22 2003-10-21 Intel Corporation Method and apparatus for compensated slew rate control of line termination
US6359478B1 (en) 2001-08-31 2002-03-19 Pericom Semiconductor Corp. Reduced-undershoot CMOS output buffer with delayed VOL-driver transistor
ITRM20030029A1 (it) * 2003-01-27 2004-07-28 Micron Technology Inc Regolazione di "robustezza" per buffer di uscita di circuiti elettronici.
TW580787B (en) * 2003-03-14 2004-03-21 Novatek Microelectronics Corp Slew rate enhancement device and slew rate enhancement method
KR100564586B1 (ko) 2003-11-17 2006-03-29 삼성전자주식회사 비트 구성에 따라 출력신호의 슬루율을 조절하는 데이터출력 드라이버
US7005886B2 (en) * 2004-04-30 2006-02-28 Agilent Technologies, Inc. Tristateable CMOS driver with controlled slew rate for integrated circuit I/O pads
US7471113B1 (en) * 2006-09-26 2008-12-30 Marvell International Ltd. Low crowbar current slew rate controlled driver
US7518395B1 (en) * 2007-10-16 2009-04-14 International Business Machines Corporation IO driver with slew rate boost circuit
US7772901B2 (en) * 2009-01-08 2010-08-10 Himax Technologies Limited Slew rate control circuit
WO2013179093A1 (en) * 2012-05-31 2013-12-05 Freescale Semiconductor, Inc. Integrated circuit comprising an io buffer driver and method therefor
DE102020105474A1 (de) * 2020-03-02 2021-09-02 Infineon Technologies Ag Integrierter Schaltkreis
KR102763935B1 (ko) * 2020-05-21 2025-02-07 에스케이하이닉스 주식회사 송신 회로
JP2025050244A (ja) 2023-09-22 2025-04-04 株式会社東芝 発振回路

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4232327A (en) * 1978-11-13 1980-11-04 Rca Corporation Extended drain self-aligned silicon gate MOSFET
JPS6234830U (enExample) * 1985-08-19 1987-02-28
US4731553A (en) * 1986-09-30 1988-03-15 Texas Instruments Incorporated CMOS output buffer having improved noise characteristics
JPS6427092A (en) * 1987-07-22 1989-01-30 Nippon Electric Ic Microcomput Output circuit
US4855623A (en) * 1987-11-05 1989-08-08 Texas Instruments Incorporated Output buffer having programmable drive current
KR960009398B1 (ko) * 1989-01-30 1996-07-18 문정환 출력 버퍼 회로
KR940005873Y1 (ko) * 1989-08-31 1994-08-26 금성일렉트론 주식회사 슬루레이트 조절 트라이 스테이트 출력버퍼
US5387824A (en) * 1989-12-01 1995-02-07 Vlsi Technology, Inc. Variable drive output buffer circuit
US5122690A (en) * 1990-10-16 1992-06-16 General Electric Company Interface circuits including driver circuits with switching noise reduction
JPH0514167A (ja) * 1991-06-28 1993-01-22 Kawasaki Steel Corp 出力ドライバ回路
US5371424A (en) * 1992-11-25 1994-12-06 Motorola, Inc. Transmitter/receiver circuit and method therefor
US5500610A (en) * 1993-10-08 1996-03-19 Standard Microsystems Corp. Very high current integrated circuit output buffer with short circuit protection and reduced power bus spikes
JP2734398B2 (ja) * 1995-03-30 1998-03-30 日本電気株式会社 出力バッファ回路
KR0161464B1 (ko) * 1995-11-28 1999-03-20 김광호 반도체 장치의 출력버퍼

Also Published As

Publication number Publication date
KR19990007298A (ko) 1999-01-25
KR100511824B1 (ko) 2005-11-22
US5977790A (en) 1999-11-02
JPH11150467A (ja) 1999-06-02

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