KR100511824B1 - 프로그램가능한슬루레이트제어출력드라이버를제공하기위한장치및방법 - Google Patents

프로그램가능한슬루레이트제어출력드라이버를제공하기위한장치및방법

Info

Publication number
KR100511824B1
KR100511824B1 KR10-1998-0023952A KR19980023952A KR100511824B1 KR 100511824 B1 KR100511824 B1 KR 100511824B1 KR 19980023952 A KR19980023952 A KR 19980023952A KR 100511824 B1 KR100511824 B1 KR 100511824B1
Authority
KR
South Korea
Prior art keywords
circuit
output
input
signal
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR10-1998-0023952A
Other languages
English (en)
Korean (ko)
Other versions
KR19990007298A (ko
Inventor
이쿠오 지미 사노
마하르 네자트
히로시 다카노
Original Assignee
소니 일렉트로닉스 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 소니 일렉트로닉스 인코포레이티드 filed Critical 소니 일렉트로닉스 인코포레이티드
Publication of KR19990007298A publication Critical patent/KR19990007298A/ko
Application granted granted Critical
Publication of KR100511824B1 publication Critical patent/KR100511824B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
KR10-1998-0023952A 1997-06-27 1998-06-24 프로그램가능한슬루레이트제어출력드라이버를제공하기위한장치및방법 Expired - Fee Related KR100511824B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/884,438 1997-06-27
US8/884,438 1997-06-27
US08/884,438 US5977790A (en) 1997-06-27 1997-06-27 Apparatus and method of providing a programmable slew rate control output driver

Publications (2)

Publication Number Publication Date
KR19990007298A KR19990007298A (ko) 1999-01-25
KR100511824B1 true KR100511824B1 (ko) 2005-11-22

Family

ID=25384632

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-1998-0023952A Expired - Fee Related KR100511824B1 (ko) 1997-06-27 1998-06-24 프로그램가능한슬루레이트제어출력드라이버를제공하기위한장치및방법

Country Status (3)

Country Link
US (1) US5977790A (enExample)
JP (1) JP4174102B2 (enExample)
KR (1) KR100511824B1 (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3076300B2 (ja) * 1998-04-20 2000-08-14 日本電気アイシーマイコンシステム株式会社 出力バッファ回路
JP3152204B2 (ja) * 1998-06-02 2001-04-03 日本電気株式会社 スルーレート出力回路
US6356102B1 (en) 1998-11-13 2002-03-12 Integrated Device Technology, Inc. Integrated circuit output buffers having control circuits therein that utilize output signal feedback to control pull-up and pull-down time intervals
US6242942B1 (en) 1998-11-13 2001-06-05 Integrated Device Technology, Inc. Integrated circuit output buffers having feedback switches therein for reducing simultaneous switching noise and improving impedance matching characteristics
US6091260A (en) * 1998-11-13 2000-07-18 Integrated Device Technology, Inc. Integrated circuit output buffers having low propagation delay and improved noise characteristics
US6288563B1 (en) 1998-12-31 2001-09-11 Intel Corporation Slew rate control
US6351172B1 (en) * 2000-02-29 2002-02-26 Dmel Inc. High-speed output driver with an impedance adjustment scheme
US6636069B1 (en) 2000-03-22 2003-10-21 Intel Corporation Method and apparatus for compensated slew rate control of line termination
US6359478B1 (en) 2001-08-31 2002-03-19 Pericom Semiconductor Corp. Reduced-undershoot CMOS output buffer with delayed VOL-driver transistor
ITRM20030029A1 (it) * 2003-01-27 2004-07-28 Micron Technology Inc Regolazione di "robustezza" per buffer di uscita di circuiti elettronici.
TW580787B (en) * 2003-03-14 2004-03-21 Novatek Microelectronics Corp Slew rate enhancement device and slew rate enhancement method
KR100564586B1 (ko) 2003-11-17 2006-03-29 삼성전자주식회사 비트 구성에 따라 출력신호의 슬루율을 조절하는 데이터출력 드라이버
US7005886B2 (en) * 2004-04-30 2006-02-28 Agilent Technologies, Inc. Tristateable CMOS driver with controlled slew rate for integrated circuit I/O pads
US7471113B1 (en) * 2006-09-26 2008-12-30 Marvell International Ltd. Low crowbar current slew rate controlled driver
US7518395B1 (en) * 2007-10-16 2009-04-14 International Business Machines Corporation IO driver with slew rate boost circuit
US7772901B2 (en) * 2009-01-08 2010-08-10 Himax Technologies Limited Slew rate control circuit
WO2013179093A1 (en) * 2012-05-31 2013-12-05 Freescale Semiconductor, Inc. Integrated circuit comprising an io buffer driver and method therefor
DE102020105474A1 (de) * 2020-03-02 2021-09-02 Infineon Technologies Ag Integrierter Schaltkreis
KR102763935B1 (ko) * 2020-05-21 2025-02-07 에스케이하이닉스 주식회사 송신 회로
JP2025050244A (ja) 2023-09-22 2025-04-04 株式会社東芝 発振回路

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6427092A (en) * 1987-07-22 1989-01-30 Nippon Electric Ic Microcomput Output circuit
KR900012434A (ko) * 1989-01-30 1990-08-04 이만용 출력 버퍼 회로
KR910005115U (ko) * 1989-08-31 1991-03-20 금성일렉트론 주식회사 슬루레이트 조절 트라이 스테이트 출력버퍼
JPH0514167A (ja) * 1991-06-28 1993-01-22 Kawasaki Steel Corp 出力ドライバ回路
JPH08274616A (ja) * 1995-03-30 1996-10-18 Nec Corp 出力バッファ回路
KR970031331A (ko) * 1995-11-28 1997-06-26 김광호 반도체 장치의 출력버퍼

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4232327A (en) * 1978-11-13 1980-11-04 Rca Corporation Extended drain self-aligned silicon gate MOSFET
JPS6234830U (enExample) * 1985-08-19 1987-02-28
US4731553A (en) * 1986-09-30 1988-03-15 Texas Instruments Incorporated CMOS output buffer having improved noise characteristics
US4855623A (en) * 1987-11-05 1989-08-08 Texas Instruments Incorporated Output buffer having programmable drive current
US5387824A (en) * 1989-12-01 1995-02-07 Vlsi Technology, Inc. Variable drive output buffer circuit
US5122690A (en) * 1990-10-16 1992-06-16 General Electric Company Interface circuits including driver circuits with switching noise reduction
US5371424A (en) * 1992-11-25 1994-12-06 Motorola, Inc. Transmitter/receiver circuit and method therefor
US5500610A (en) * 1993-10-08 1996-03-19 Standard Microsystems Corp. Very high current integrated circuit output buffer with short circuit protection and reduced power bus spikes

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6427092A (en) * 1987-07-22 1989-01-30 Nippon Electric Ic Microcomput Output circuit
KR900012434A (ko) * 1989-01-30 1990-08-04 이만용 출력 버퍼 회로
KR910005115U (ko) * 1989-08-31 1991-03-20 금성일렉트론 주식회사 슬루레이트 조절 트라이 스테이트 출력버퍼
JPH0514167A (ja) * 1991-06-28 1993-01-22 Kawasaki Steel Corp 出力ドライバ回路
JPH08274616A (ja) * 1995-03-30 1996-10-18 Nec Corp 出力バッファ回路
KR970031331A (ko) * 1995-11-28 1997-06-26 김광호 반도체 장치의 출력버퍼

Also Published As

Publication number Publication date
JP4174102B2 (ja) 2008-10-29
KR19990007298A (ko) 1999-01-25
US5977790A (en) 1999-11-02
JPH11150467A (ja) 1999-06-02

Similar Documents

Publication Publication Date Title
KR100511824B1 (ko) 프로그램가능한슬루레이트제어출력드라이버를제공하기위한장치및방법
US6130563A (en) Output driver circuit for high speed digital signal transmission
US5623216A (en) Output buffer current slew rate control integrated circuit
US6911860B1 (en) On/off reference voltage switch for multiple I/O standards
EP0643487B1 (en) MOS output circuit with leakage current protection
US5986489A (en) Slew rate control circuit for an integrated circuit
CA2113987A1 (en) Very low voltage inter-chip cmos logic signaling for large numbers of high-speed output lines each associated with large capacitive loads
JPH11150467A5 (enExample)
US6300800B1 (en) Integrated circuit I/O buffer with series P-channel and floating well
US6970024B1 (en) Over-voltage protection of integrated circuit I/O pins
WO2018005115A1 (en) Edp mipi dsi combination architecture
US6501293B2 (en) Method and apparatus for programmable active termination of input/output devices
KR100343914B1 (ko) 반도체 장치
US5485107A (en) Backplane driver circuit
US7154309B1 (en) Dual-mode output driver configured for outputting a signal according to either a selected high voltage/low speed mode or a low voltage/high speed mode
US5828233A (en) Mixed mode CMOS input buffer with bus hold
US6346827B1 (en) Programmable logic device input/output circuit configurable as reference voltage input circuit
US7157931B2 (en) Termination circuits having pull-down and pull-up circuits and related methods
US6054875A (en) Output buffer for a mixed voltage environment
JP2008537366A (ja) Ｉ２ｃバス用エッジレート制御回路
US6154058A (en) Output buffer
US7138822B2 (en) Integrated circuit and method of improving signal integrity
US5682116A (en) Off chip driver having slew rate control and differential voltage protection circuitry
US20060033529A1 (en) Reducing Coupling Effect on Reference Voltages When Output Buffers Implemented with Low Voltage Transistors Generate High Voltage Output Signals
CA2335312C (en) Interface module with protection circuit and method of protecting an interface

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20110810

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

FPAY Annual fee payment

Payment date: 20120807

Year of fee payment: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20130826

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20130826

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000