JP4011941B2 - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

Info

Publication number
JP4011941B2
JP4011941B2 JP2002067496A JP2002067496A JP4011941B2 JP 4011941 B2 JP4011941 B2 JP 4011941B2 JP 2002067496 A JP2002067496 A JP 2002067496A JP 2002067496 A JP2002067496 A JP 2002067496A JP 4011941 B2 JP4011941 B2 JP 4011941B2
Authority
JP
Japan
Prior art keywords
memory cell
block
transistor
bit line
block selection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2002067496A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003273329A5 (https=
JP2003273329A (ja
Inventor
大三郎 高島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2002067496A priority Critical patent/JP4011941B2/ja
Priority to US10/385,714 priority patent/US6750493B2/en
Publication of JP2003273329A publication Critical patent/JP2003273329A/ja
Publication of JP2003273329A5 publication Critical patent/JP2003273329A5/ja
Application granted granted Critical
Publication of JP4011941B2 publication Critical patent/JP4011941B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
JP2002067496A 2002-03-12 2002-03-12 半導体記憶装置 Expired - Fee Related JP4011941B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2002067496A JP4011941B2 (ja) 2002-03-12 2002-03-12 半導体記憶装置
US10/385,714 US6750493B2 (en) 2002-03-12 2003-03-12 Semiconductor storage device including nonvolatile ferroelectric memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002067496A JP4011941B2 (ja) 2002-03-12 2002-03-12 半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2003273329A JP2003273329A (ja) 2003-09-26
JP2003273329A5 JP2003273329A5 (https=) 2005-09-02
JP4011941B2 true JP4011941B2 (ja) 2007-11-21

Family

ID=28034949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002067496A Expired - Fee Related JP4011941B2 (ja) 2002-03-12 2002-03-12 半導体記憶装置

Country Status (2)

Country Link
US (1) US6750493B2 (https=)
JP (1) JP4011941B2 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10155023B4 (de) * 2001-11-05 2008-11-06 Qimonda Ag Leitungsanordnung für Bitleitungen zur Kontaktierung mindestens einer Speicherzelle und Verfahren zur Herstellung einer Leitungsanordnung für Bitleitungen
JP2006332335A (ja) * 2005-05-26 2006-12-07 Toshiba Corp 半導体記憶装置
JP2010033624A (ja) * 2008-07-25 2010-02-12 Toshiba Corp 半導体記憶装置
CN117859204A (zh) * 2022-08-09 2024-04-09 京东方科技集团股份有限公司 基板和电子装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1225024C (zh) * 2000-07-25 2005-10-26 松下电器产业株式会社 半导体存储装置及其驱动方法

Also Published As

Publication number Publication date
JP2003273329A (ja) 2003-09-26
US6750493B2 (en) 2004-06-15
US20030173606A1 (en) 2003-09-18

Similar Documents

Publication Publication Date Title
US8611122B2 (en) Semiconductor memory device having vertical transistors
JP4660564B2 (ja) 半導体記憶装置
US20120307545A1 (en) Interleaved Bit Line Architecture for 2T2C Ferroelectric Memories
JP3935807B2 (ja) 不揮発性強誘電体メモリ及びその駆動方法
US7417886B2 (en) Ferroelectric random access memory
US6459118B1 (en) NAND type nonvolatile ferroelectric memory cell
JP4005764B2 (ja) 半導体記憶装置
JP4647313B2 (ja) 半導体メモリ
JP4011941B2 (ja) 半導体記憶装置
US6438042B1 (en) Arrangement of bitline boosting capacitor in semiconductor memory device
KR100541818B1 (ko) 반도체 메모리 장치의 라인 배치구조
KR100579749B1 (ko) 2-트랜지스터/2-커패시터 타입의 메모리 셀로 구성된 집적메모리
JP4348228B2 (ja) 強誘電体メモリ
KR100397386B1 (ko) 메모리 셀 및 기준 셀을 포함한 집적 메모리 및 상기메모리용 작동 방법
JPH0982911A (ja) ダイナミック型半導体記憶装置
KR100449953B1 (ko) 강유전체 메모리 장치의 셀어레이
US7193260B2 (en) Ferroelectric memory device
CN100416699C (zh) 半导体存储装置
KR19980087512A (ko) 하나의 메모리셀에 다수비트의 정보를 저장할 수 있는 반도체 기억장치
JPH0554635A (ja) 半導体メモリ装置
JP4192613B2 (ja) 半導体記憶装置
US20040241943A1 (en) Nonvolatile ferroelectric memory device and method for fabricating the same
JP3612276B2 (ja) ダイナミック型半導体記憶装置
JP3945498B2 (ja) メモリセル及び半導体記憶装置
JP2010198668A (ja) 強誘電体記憶装置および電子機器

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050301

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050301

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070830

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20070904

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20070906

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100914

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110914

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110914

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120914

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120914

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130914

Year of fee payment: 6

LAPS Cancellation because of no payment of annual fees