JP4011304B2 - 半導体装置およびその作製方法 - Google Patents

半導体装置およびその作製方法 Download PDF

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Publication number
JP4011304B2
JP4011304B2 JP2001141133A JP2001141133A JP4011304B2 JP 4011304 B2 JP4011304 B2 JP 4011304B2 JP 2001141133 A JP2001141133 A JP 2001141133A JP 2001141133 A JP2001141133 A JP 2001141133A JP 4011304 B2 JP4011304 B2 JP 4011304B2
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Japan
Prior art keywords
gate electrode
film
shape
semiconductor layer
dry etching
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Expired - Lifetime
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JP2001141133A
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English (en)
Japanese (ja)
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JP2002083805A5 (https=
JP2002083805A (ja
Inventor
英臣 須沢
幸治 小野
徹 高山
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2001141133A priority Critical patent/JP4011304B2/ja
Publication of JP2002083805A publication Critical patent/JP2002083805A/ja
Publication of JP2002083805A5 publication Critical patent/JP2002083805A5/ja
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Publication of JP4011304B2 publication Critical patent/JP4011304B2/ja
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Expired - Lifetime legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
JP2001141133A 2000-05-12 2001-05-11 半導体装置およびその作製方法 Expired - Lifetime JP4011304B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001141133A JP4011304B2 (ja) 2000-05-12 2001-05-11 半導体装置およびその作製方法

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2000-140999 2000-05-12
JP2000140999 2000-05-12
JP2000-193614 2000-06-27
JP2000193614 2000-06-27
JP2001141133A JP4011304B2 (ja) 2000-05-12 2001-05-11 半導体装置およびその作製方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007118237A Division JP4801622B2 (ja) 2000-05-12 2007-04-27 半導体装置およびその作製方法

Publications (3)

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JP2002083805A JP2002083805A (ja) 2002-03-22
JP2002083805A5 JP2002083805A5 (https=) 2005-10-06
JP4011304B2 true JP4011304B2 (ja) 2007-11-21

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JP2001141133A Expired - Lifetime JP4011304B2 (ja) 2000-05-12 2001-05-11 半導体装置およびその作製方法

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Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100857133B1 (ko) * 2002-06-28 2008-09-05 엘지디스플레이 주식회사 액정표시장치용 어레이기판 및 그 제조방법
JP4271413B2 (ja) 2002-06-28 2009-06-03 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3646718B2 (ja) 2002-10-04 2005-05-11 セイコーエプソン株式会社 半導体装置の製造方法
JP3904512B2 (ja) 2002-12-24 2007-04-11 シャープ株式会社 半導体装置およびその製造方法、並びに半導体装置を備えた電子機器
JP4663963B2 (ja) * 2003-02-17 2011-04-06 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4818576B2 (ja) * 2003-07-03 2011-11-16 三菱電機株式会社 薄膜トランジスタおよび薄膜トランジスタを備えた表示装置
KR100543001B1 (ko) 2003-09-03 2006-01-20 삼성에스디아이 주식회사 박막 트랜지스터 및 액티브 매트릭스 평판 표시 장치
JP4455855B2 (ja) * 2003-09-19 2010-04-21 株式会社半導体エネルギー研究所 半導体装置及びその作製方法
US7288480B2 (en) 2004-04-23 2007-10-30 Semiconductor Energy Laboratory Co., Ltd. Thin film integrated circuit and method for manufacturing the same, CPU, memory, electronic card and electronic device
KR100560821B1 (ko) * 2004-08-17 2006-03-13 삼성전자주식회사 반도체 소자의 캐패시터 형성 방법
US8319295B2 (en) * 2007-01-10 2012-11-27 Imec Use of F-based gate etch to passivate the high-k/metal gate stack for deep submicron transistor technologies
JP5503247B2 (ja) * 2009-10-19 2014-05-28 株式会社ジャパンディスプレイ 薄膜トランジスタの製造方法および液晶表示装置の製造方法
TWI665778B (zh) * 2014-02-05 2019-07-11 日商半導體能源研究所股份有限公司 半導體裝置、模組及電子裝置

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JP2002083805A (ja) 2002-03-22

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