JP4000745B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP4000745B2 JP4000745B2 JP2000077830A JP2000077830A JP4000745B2 JP 4000745 B2 JP4000745 B2 JP 4000745B2 JP 2000077830 A JP2000077830 A JP 2000077830A JP 2000077830 A JP2000077830 A JP 2000077830A JP 4000745 B2 JP4000745 B2 JP 4000745B2
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Description
【発明の属する技術分野】
本発明は、基板に搭載された半導体チップと該基板の配線部とをワイヤボンディングしてなる半導体装置の製造方法に関する。
【0002】
【従来の技術】
従来、この種の一般的な半導体装置の製造方法を図4に示す。まず、図4(a)に示す様に、一面上にAuフラッシュめっきよりなる配線部(ボンディングランド)J1が形成されたプリント基板J2を用意し(図4(a)中、J3はコンデンサ等の部品、J4は半田)、図4(b)に示す様に、プリント基板J2の一面に半導体チップJ5を導電性接着剤J6により接着し搭載(ダイマウント)した後、図4(d)に示す様に、半導体チップJ5と配線部J1とを、AuやAlのワイヤボンディングを行い、ワイヤJ7で結線するようにしている。
【0003】
ここで、ボンディング工程直前に、図4(c)に示す様に、配線部J1であるAuフラッシュめっきの表面を、プラズマ装置を用いてプラズマ放電によって発生するイオン粒子を衝突させることにより清浄化する、つまりプラズマクリーニングを行う方法が知られている(特開平7−283199号公報、特開平8−115936号公報、特開平8−162438号公報、特開平10−50755号公報等)。
【0004】
プリント基板J2の場合、配線部J1にはCuめっき配線が用いられ、酸化防止のため最表面にAuフラッシュめっきを施すようにしているが、CuとAuは相互拡散するため、間にNiめっきを挟む構造としている。しかしながら、上述の半田付工程時あるいは半導体チップのダイマウント工程時の熱履歴によって、NiめっきがAuめっき上に析出し、ワイヤボンディング性が低下してしまうため、ワイヤボンディング前にプラズマクリーニングを行うようにしている。
【0005】
【発明が解決しようとする課題】
しかしながら、ボンディング工程直前でプラズマ中で配線部(ボンディングランド)J1表面をプラズマクリーニングする場合、半導体チップJ5も同様にプラズマ雰囲気中にある(プラズマ中性子にさらされる)ため、その半導体チップJ5にダメージを与える可能性が高い。
【0006】
本発明は上記問題点に鑑み、半導体チップにプラズマクリーニングによるダメージを与えることなく、ワイヤボンディング性を確保することのできる半導体装置の製造方法を提供することを目的とする。
【0007】
【課題を解決するための手段】
本発明は、導電性接着剤の印刷、部品搭載、接着剤硬化、ワイヤボンディングの一連の工程において、基板素材がプリント基板の場合、配線のAuフラッシュめっきの下地であるNiが硬化時に熱により表面に析出しボンディングを困難にしているが、例えばセラミック基板のようなCuめっき配線では、めっきの下地が析出することはなく、半導体チップ搭載前にプラズマクリーニングすることができるという点に着目してなされたものである。
【0008】
即ち、請求項1記載の発明では、一面(11)上に配線部(20、21)が形成された基板(10)を用意し、該基板の一面に、プラズマ放電によって発生するイオン粒子を衝突させることにより該配線部の表面を清浄化した後、該基板の一面に、導電性接着剤(40)を使用して、半導体チップ(50)およびそれ以外の部品(60)からなる全部品を搭載し、続いて該半導体チップと該配線部とをワイヤボンディングにより電気的に接続するようにしたことを特徴としている。本発明によれば、ボンディング性を確保しつつ、半導体チップ搭載工程(S5、S8)前に配線部表面のプラズマクリーニングを可能とできる。
【0009】
また、請求項2記載の発明では、配線部(20、21)をCu(CuめっきまたはCu厚膜等)またはAg(Ag厚膜)等により形成しているから、該配線部表面をプラズマクリーニングした後、半導体チップを搭載しても、従来のプリント基板のAuフラッシュめっき/Niめっき/Cuめっき配線構造のように、チップ搭載工程の熱履歴によって配線部の表面に析出物が生じてその後のボンディング性を損なうことが無い。
【0010】
なお、上記各手段の括弧内の符号は、後述する実施形態に記載の具体的手段との対応関係を示す一例である。
【0011】
【発明の実施の形態】
以下、本発明を図に示す実施形態について説明する。図1は本発明の実施形態に係る半導体装置の製造方法を示す流れ図であり、図2及び図3は、その製造方法の工程説明図である。図2及び図3(a)は、最終的に図3(b)に示すワイヤボンディングが施された半導体装置100を製造する途中工程を示している。以下、本実施形態について製造工程順に説明していく。
【0012】
まず、基板用意工程S1では、図2(a)に示す様に、一面に表層配線部を有するセラミック基板又はプリント基板を用意する。セラミック基板としては、例えば一面11上にタングステン等の表層配線12が形成されたメタライズ基板(本発明でいう基板)10を用意する。プリント基板としては、例えば一面上にCuめっき配線が施された配線基板10を用意する。
【0013】
次に、Cuめっき工程S2では、図2(b)に示す様に、メタライズ基板10の一面11に形成された表層配線12に、電気めっき法等によりCuめっきを施し、表層配線12の表面をCuめっき層20にて被覆する。プリント基板の場合、Cuめっき工程は省くことができる。
【0014】
なお、図1に示す様に、Cuめっき工程S2の後に、Cu厚膜印刷工程S3を行っても良い。この工程S3は、図2(c)に示す様に、Cuめっき層20の表面に印刷によって選択的にCu厚膜21を形成する。ここで、Cu厚膜印刷工程S3を行わない場合にはCuめっき層20が、Cu厚膜印刷工程S3を行う場合にはCuめっき層20及びCu厚膜21が、各場合、本発明でいうCuよりなる配線部に相当する。
【0015】
上記工程S2またはS3(配線部形成工程)の後、プラズマクリーニング工程S4を行う。プラズマクリーニング装置30はチャンバ31内に一対の電極32、33を設け、一方の電極32にメタライズ基板10の他面側を固定するようになっている。そして、例えば、チャンバ31内をアルゴンと水素の混合ガス雰囲気として、一対の電極32、33間に電界を印加し(例えば750W、2分間)、プラズマ放電によって発生するイオン粒子(Ar+、H+等)を基板10の一面11に衝突させ、配線部20、21の表面を清浄化する。
【0016】
この工程S4により、配線部20、21の表面に初期的に存在する汚れ、酸化膜などを除去することができる。
【0017】
次に、全部品一括組付工程S5では、図3(a)に示す様に、導電性接着剤40を使用して、半導体チップ50およびコンデンサなどの部品60を基板10の配線部20、21上に電気的に接続し搭載する。チップ50及び部品60と接続されない配線部20、21はワイヤボンディングのボンディングランドとなる。
【0018】
ここで、導電性接着剤40は、樹脂中に、Ag、Ag/Pd、Ag/Pt、Au、Cu、Ni等をフィラーとして混入し、これらの物理的接触によって導電性を得るための接着剤である。導電性接着剤40にブリード(導電性接着剤40に含まれる樹脂中の成分が硬化せずに外に流れ出す現象)の少ない材料を選べば、半田のようにフラックスが基板上に流出することなく接続することができるため、近傍にボンディングランドが存在してもボンディング性を低下させることなく、部品を接続することができる。
【0019】
また、導電性接着剤の硬化は、低酸素濃度(10ppm以下)のN2雰囲気下で熱処理(例えば150℃、10分間)して硬化させれば、Cuを用いた配線部20、21であっても、全く酸化しないことが確認されている。
【0020】
これらの工程S1〜S5を経た後、ワイヤボンディング工程S6を行うことによって、図3(b)に示す様に、AuあるいはAu合金またはAlあるいはAl合金のワイヤ70によって半導体チップ50と配線部20、21とが電気的に接続された半導体装置100が出来上がる。
【0021】
なお、本実施形態においては、図1に示す様に、Cuめっき工程S2またはCu厚膜印刷工程S3の後に、半導体チップ以外の部品組付工程S7を行い、その後、上記プラズマクリーニング工程S4を行い、次に、半導体チップ組付工程S8を行って、上記ワイヤボンディング工程S6を行っても良い(変形例)。
【0022】
即ち、この変形例においては、工程S2またはS3の後に、半導体チップ以外の部品組付工程S7にて、導電性接着剤40を用いて半導体チップ50以外の部品60を配線部20、21上に搭載し、その後、上記プラズマクリーニング工程S4を行い、次に、半導体チップ組付工程S8にて、導電性接着剤40を用いて半導体チップ50を配線部20、21上に搭載し、続いて、上記ワイヤボンディング工程S6を行う。ここで、工程S7及びS8は、例えば、上記工程S5と同様の条件(例えばN2雰囲気、150℃、10分間)にて行うことができる。
【0023】
また、工程S7においてCu配線部の表層が酸化されたとしても、その後のプラズマクリーニング工程S4で清浄化され、工程S8を上述の工程S5と同様の条件で行えば問題はない。この変形例によっても、図3(b)に示す半導体装置100が出来上がる。
【0024】
上記の製造方法においては、工程S1、S2、S3が、本発明でいう「基板を用意する工程」に相当し、工程S4が、本発明でいう「配線部の表面を清浄化する工程」に相当し、工程S5、S8が、本発明でいう「半導体チップを搭載する工程」に相当し、工程S6が、本発明でいう「ワイヤボンディングにより電気的に接続する工程」に相当する。
【0025】
ところで、上記製造方法によれば、ワイヤボンディングのボンディングランドである配線部をCu(Cuめっき層20および/またはCu厚膜21)により形成しているから、配線部20、21表面をプラズマクリーニングした後、半導体チップ50を搭載しても、従来のAuフラッシュめっきを用いたプリント基板のようにNiめっきを必要とせず、チップ搭載工程S5、S8の熱履歴によって配線部の表面に析出物が生じボンディング性を損なうことが無くなる。
【0026】
上述のメタライズ基板のように下地にタングステンを有していても、タングステンとCuは拡散しにくいため、下地層(タングステン)の表層への析出はない。従って、良好なボンディング性を確保しつつ、半導体チップ搭載工程前に配線部表面のプラズマクリーニングを可能とでき、半導体チップ50は、プラズマ雰囲気にさらされることがないから、ダメージの懸念が無くなる。
【0027】
また、本実施形態では、基板として、セラミック基板又はプリント基板上にCuを配線材料として使用したものを用い、Cuの配線部20、21はめっき、厚膜印刷などの手法により形成している。従来のプリント基板上のAuフラッシュめっきでも厚く形成することにより、Niめっきの析出を防ぐことはできるが、大きなコストアップとなってしまう。ところが、Cu材料を使用することにより、膜厚を厚く形成しても安く仕上げることができるという利点を持つ。
【0028】
なお、基板10の一面11に形成された配線部においては、少なくともワイヤボンディングされるものが、CuめっきやCu厚膜で構成されていればよく、部品60を接続するものはCuで構成されていないものであってもよい。
【0029】
また、基板10としては、セラミック基板上にAg厚膜、ガラスペーストを交互に印刷、焼成して作成した配線基板を用いることもできる。この場合、表層配線はAg厚膜配線となる。この場合も、ボンディング性を悪化させる要因となるNiめっきの使用がないため、半導体チップ搭載前にプラズマクリーニング工程を実施することができ、良好なボンディング性を確保しつつ、半導体チップへのダメージの懸念を無くすことができる。
【図面の簡単な説明】
【図1】本発明の実施形態に係る半導体装置の製造方法を示す流れ図である。
【図2】上記実施形態に係る半導体装置の製造方法を説明する工程説明図である。
【図3】図2に続く製造方法を説明する工程説明図である。
【図4】従来の半導体装置の製造方法を説明する工程説明図である。
【符号の説明】
10…メタライズ基板、11…メタライズ基板の一面、20…Cuめっき層、
21…Cu厚膜、50…半導体チップ、S1…基板用意工程、
S2…Cuめっき工程、S3…Cu厚膜印刷工程、
S4…プラズマクリーニング工程、S5…全部品一括組付工程、
S6…ワイヤボンディング工程、S8…半導体チップ組付工程。
Claims (3)
- 一面(11)上に配線部(20、21)が形成された基板(10)を用意する工程(S1、S2、S3)と、
前記基板の一面に、プラズマ放電によって発生するイオン粒子を衝突させることにより前記配線部の表面を清浄化する工程(S4)と、
この工程の後、前記基板の一面に、導電性接着剤(40)を使用して、半導体チップ(50)およびそれ以外の部品(60)からなる全部品を搭載する工程(S5、S8)と、
搭載された半導体チップと前記配線部とをワイヤボンディングにより電気的に接続する工程(S6)と、を有することを特徴とする半導体装置の製造方法。 - 前記配線部(20、21)をCuめっき、Cu厚膜またはAg厚膜により形成することを特徴とする請求項1に記載に半導体装置の製造方法。
- 前記ワイヤボンディング工程(S6)は、AuあるいはAu合金またはAlあるいはAl合金を用いて行うことを特徴とする請求項1または2に記載の半導体装置の製造方法。
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JP3675407B2 (ja) * | 2001-06-06 | 2005-07-27 | 株式会社デンソー | 電子装置 |
JP2010010383A (ja) * | 2008-06-26 | 2010-01-14 | National Institute Of Advanced Industrial & Technology | 半導体チップ電極接合方法 |
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