JP3876401B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP3876401B2 JP3876401B2 JP22526699A JP22526699A JP3876401B2 JP 3876401 B2 JP3876401 B2 JP 3876401B2 JP 22526699 A JP22526699 A JP 22526699A JP 22526699 A JP22526699 A JP 22526699A JP 3876401 B2 JP3876401 B2 JP 3876401B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- silicide
- composition ratio
- thickness
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
- H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
Landscapes
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22526699A JP3876401B2 (ja) | 1999-08-09 | 1999-08-09 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22526699A JP3876401B2 (ja) | 1999-08-09 | 1999-08-09 | 半導体装置の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001053027A JP2001053027A (ja) | 2001-02-23 |
| JP2001053027A5 JP2001053027A5 (enExample) | 2005-06-16 |
| JP3876401B2 true JP3876401B2 (ja) | 2007-01-31 |
Family
ID=16826637
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22526699A Expired - Lifetime JP3876401B2 (ja) | 1999-08-09 | 1999-08-09 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3876401B2 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100446300B1 (ko) | 2002-05-30 | 2004-08-30 | 삼성전자주식회사 | 반도체 소자의 금속 배선 형성 방법 |
| JP2004172541A (ja) | 2002-11-22 | 2004-06-17 | Renesas Technology Corp | 半導体装置の製造方法 |
| US6891192B2 (en) * | 2003-08-04 | 2005-05-10 | International Business Machines Corporation | Structure and method of making strained semiconductor CMOS transistors having lattice-mismatched semiconductor regions underlying source and drain regions |
| US20050253205A1 (en) * | 2004-05-17 | 2005-11-17 | Fujitsu Limited | Semiconductor device and method for fabricating the same |
| JP2006351581A (ja) | 2005-06-13 | 2006-12-28 | Fujitsu Ltd | 半導体装置の製造方法 |
| US20070238236A1 (en) * | 2006-03-28 | 2007-10-11 | Cook Ted Jr | Structure and fabrication method of a selectively deposited capping layer on an epitaxially grown source drain |
| US7544997B2 (en) * | 2007-02-16 | 2009-06-09 | Freescale Semiconductor, Inc. | Multi-layer source/drain stressor |
| JP2009043916A (ja) | 2007-08-08 | 2009-02-26 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP2009123960A (ja) * | 2007-11-15 | 2009-06-04 | Toshiba Corp | 半導体装置 |
| US12062579B2 (en) * | 2020-10-30 | 2024-08-13 | Applied Materials, Inc. | Method of simultaneous silicidation on source and drain of NMOS and PMOS transistors |
-
1999
- 1999-08-09 JP JP22526699A patent/JP3876401B2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2001053027A (ja) | 2001-02-23 |
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