JP3355511B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JP3355511B2
JP3355511B2 JP06490395A JP6490395A JP3355511B2 JP 3355511 B2 JP3355511 B2 JP 3355511B2 JP 06490395 A JP06490395 A JP 06490395A JP 6490395 A JP6490395 A JP 6490395A JP 3355511 B2 JP3355511 B2 JP 3355511B2
Authority
JP
Japan
Prior art keywords
bit line
insulating film
forming
manufacturing
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP06490395A
Other languages
English (en)
Japanese (ja)
Other versions
JPH08236720A (ja
Inventor
羊一 宮井
浩之 栗野
政幸 諸井
勝司 朴
善広 尾形
康博 奥本
Original Assignee
日本テキサス・インスツルメンツ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本テキサス・インスツルメンツ株式会社 filed Critical 日本テキサス・インスツルメンツ株式会社
Priority to JP06490395A priority Critical patent/JP3355511B2/ja
Priority to TW085104329A priority patent/TW295709B/zh
Publication of JPH08236720A publication Critical patent/JPH08236720A/ja
Application granted granted Critical
Publication of JP3355511B2 publication Critical patent/JP3355511B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Semiconductor Memories (AREA)
JP06490395A 1995-02-28 1995-02-28 半導体装置の製造方法 Expired - Fee Related JP3355511B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP06490395A JP3355511B2 (ja) 1995-02-28 1995-02-28 半導体装置の製造方法
TW085104329A TW295709B (enExample) 1995-02-28 1996-04-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP06490395A JP3355511B2 (ja) 1995-02-28 1995-02-28 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPH08236720A JPH08236720A (ja) 1996-09-13
JP3355511B2 true JP3355511B2 (ja) 2002-12-09

Family

ID=13271496

Family Applications (1)

Application Number Title Priority Date Filing Date
JP06490395A Expired - Fee Related JP3355511B2 (ja) 1995-02-28 1995-02-28 半導体装置の製造方法

Country Status (2)

Country Link
JP (1) JP3355511B2 (enExample)
TW (1) TW295709B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100218295B1 (ko) * 1995-12-30 1999-09-01 구본준 반도체 메모리셀 제조방법
TW454339B (en) * 1997-06-20 2001-09-11 Hitachi Ltd Semiconductor integrated circuit apparatus and its fabricating method
US6380026B2 (en) 1997-08-22 2002-04-30 Micron Technology, Inc. Processing methods of forming integrated circuitry memory devices, methods of forming DRAM arrays, and related semiconductor masks
KR100487915B1 (ko) * 1997-12-31 2005-08-01 주식회사 하이닉스반도체 반도체소자의캐패시터형성방법
KR100275334B1 (ko) * 1997-12-31 2001-01-15 김영환 반도체소자의제조방법
KR100487511B1 (ko) * 1998-07-06 2005-08-01 삼성전자주식회사 반도체 장치의 제조 방법
JP4528504B2 (ja) * 2003-08-22 2010-08-18 ルネサスエレクトロニクス株式会社 半導体装置とその製造方法

Also Published As

Publication number Publication date
JPH08236720A (ja) 1996-09-13
TW295709B (enExample) 1997-01-11

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