JP2906961B2 - Solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device.

[0002]

2. Description of the Related Art Conventionally, a CCD type solid-state image pickup device is shown in FIG.
The structure shown in FIG. In FIG. 3, 1 is an N-type silicon substrate, 2 is a P-type well, 3 is an N-type region of a photoelectric conversion element, 4-1 and 4-2 are P ⁺ type channel stoppers, and 5 is a signal transfer unit (CCD vertical register). ) N-type buried layer, 8
Is a transfer gate electrode of the CCD. The effective photoelectric conversion region is the active region around the N-type region in the N-type region 3, the P ⁺ -type region (4-1, 4-2) and the P-type well 2. The N-type silicon substrate 1 is reverse-biased with respect to the P-type well 2. Therefore, negative charges generated in the depletion layer region formed between the N-type silicon substrate 1 and the P-type well 2 are as follows:
It is discharged to an N-type silicon substrate.

[0003]

In such a conventional structure, for example, when light as shown in FIG. 3 is incident, an area outside the active region (a region of the P-type well 2 which is not depleted during the operation of the solid-state imaging device). (2) There is a problem that a part of the electric charges generated by the photoelectric conversion in the lower part enters the N-type buried layer 5 due to diffusion and generates smear.

An object of the present invention is to provide a solid-state imaging device in which smear is suppressed without impairing the driving stability of a CCD.

[0005]

According to the present invention, there is provided a second conductivity type well provided on a surface portion of a first conductivity type semiconductor substrate, and a second conductivity type well formed selectively on the surface portion of the second conductivity type well. 1
A photosensitive portion in which photoelectric conversion elements including a conductive type region are arranged in a plurality of rows; and a first conductive type formed on a surface of the second conductive type well away from the first conductive type region and parallel to the photosensitive portion. A CCD vertical register including a plurality of transfer gate electrodes disposed on a surface of the buried channel layer and the first conductivity type buried channel layer via a gate insulating film; and reading signal charges from the photoelectric conversion elements and reading the signal into the CCD vertical register. A transfer gate for supplying the solid-state imaging device, wherein the buried channel layer of the first conductivity type or the transfer gate of the second conductivity type well is provided below the transfer gate .
The defect layer where carriers recombine is not depleted during operation.
The active region is selectively provided outside the active region . In this case, the defect layer is an amorphous layer or a polycrystalline layer.
be able to. Furthermore, the semiconductor substrate is made of silicon,
Defect layer is formed by implantation of Si ion or inert ion
Be performed. In addition, the first conductivity type region
Avoiding the area directly below the region, make a flat plate parallel to the surface of the semiconductor substrate.
A defect layer can be embedded.

[0006]

The defect layer acts as an electron-hole pair recombination region, so that electrons and holes generated outside the active region can be prevented from flowing into the transfer gate region and the first conductivity type buried region. Can reduce smear.

[0007]

FIG. 1 is a schematic sectional view of a CCD type solid-state imaging device according to an embodiment of the present invention.

In this embodiment, the impurity concentration is 2 × 10 ¹⁴ / c.
Depth 2 provided on the surface of n-type silicon substrate 1 of m ³
３3 μm, impurity concentration 1 × 10 ¹⁵ -1 × 10 ¹⁶ / cm ³
Including a P-type well 2 and an N-type region 3 (having a thickness of 0.5 to 1.0 μm and an impurity concentration of 2 × 10 ¹⁶ / cm ³ ) selectively formed on the surface of the P-type well 2. A photosensitive portion in which the conversion elements are arranged in a plurality of rows; and an N-type buried channel layer 5 (depth of 0.2 to 0) formed on the surface of the P-type well 2 so as to be separated from the N-type region and parallel to the aforementioned photosensitive portion. .3 μm, an impurity concentration of 1 × 10 ¹⁷ / cm ³ ) and a plurality of transfer gate electrodes 8 (such transfer gate electrodes in a direction perpendicular to the paper surface) arranged via the gate insulating film 7 on the surface 5 of the N-type buried channel layer. ), And a transfer gate (an overhanging portion of the transfer gate region 6 and the transfer gate electrode 8 thereon) which reads out signal charges from the photoelectric conversion element and supplies the signal charge to the CCD vertical register.
In the solid-state imaging device having the following, a defect layer 9 in which carriers are recombined is provided below the N-type region 3, the N-type buried channel layer 5, or the transfer gate region 6 in the P-type well 2 and not depleted during driving. It is that.

P ⁺ type channel stopper 4 on N type region 3
-2 has a thickness of 0.1 to 0.2 μm and an impurity concentration of 1 × 1
0 ¹⁸ / cm ³ .

Next, a method for forming the defect layer 9 will be described.

As shown in FIG. 2, after the formation of the N-type region 3, the N-type buried channel layer 5 and the like is completed, a resist film 10 is formed and used as a mask with Si ions at 650 keV and at least 1 × 10 ¹³ / cm ^2. Implant and anneal at a temperature of 800 ° C. or less. The portion implanted with Si ions remains as a polycrystalline silicon region or an amorphous silicon region. A large number of recombination centers exist in the defect layer thus formed (formed at a depth of about 1 μm from the surface of the P-type well region 2).

In addition to Si, a defect layer can also be formed by ion implantation of inert atoms or molecules in Si such as inert ions such as argon. In this embodiment, the reverse bias voltage applied between the N-type silicon substrate 1 and the P-type well substrate 2 is approximately 8 volts.
The pulse height of the voltage applied to the transfer gate electrode is about 9 volts.

Further, in the embodiment, the P-well type solid-state imaging device has been described. However, it is apparent that the same effect can be obtained in the N-well type solid-state imaging device using the P-type substrate.

[0014]

As described above, according to the present invention, smear can be suppressed by providing a defect layer at a place outside the active region in the well region of the solid-state imaging device, and the image quality can be further improved. There is an effect that can be done.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention.

FIG. 2 is a cross-sectional view for explaining a method for forming a defect layer in one embodiment.

FIG. 3 is a sectional view showing a conventional example.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 N-type silicon substrate 2 P-type well 3 N-type region 4-1, 4-2 P ⁺ channel stopper 5 N-type buried channel 6 transfer gate region 7 gate insulating film 8 transfer gate electrode 9 defect layer 10 resist film

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 27/148 H04N 5/335

Claims (4)

(57) [Claims] 1. A photoelectric conversion device comprising: a second conductivity type well provided on a surface portion of a first conductivity type semiconductor substrate; and a first conductivity type region selectively formed on a surface portion of the second conductivity type well. A photosensitive portion in which elements are arranged in a plurality of rows; a first conductivity type buried channel layer formed on a surface portion of the second conductivity type well away from the first conductivity type region in parallel with the photosensitive portion; CCD including a plurality of transfer gate electrodes disposed on the surface of a conductive type buried channel layer via a gate insulating film
And the vertical registers, in the solid-state imaging device having a transfer gate for supplying read the signal charges from the photoelectric conversion element to the CCD vertical register, of the first conductivity type buried channel layer or the transfer gate of the second conductivity type well Defects below which the carriers recombine
A solid-state imaging device , wherein a layer is selectively provided outside an active region that is not depleted during driving . 2. The solid-state imaging device according to claim 1, wherein the defect layer is an amorphous layer or a polycrystalline layer. 3. The semiconductor substrate is made of silicon, and the defect layer is made of silicon.
Formed by implantation of Si ions or inert ions
The solid-state imaging device according to claim 1. 4. A semiconductor avoiding a portion immediately below a first conductivity type region.
A flat defect layer is buried parallel to the surface of the substrate
The solid-state imaging device according to claim 1.