JPH07183481A - Solid-state image sensing device - Google Patents

Abstract

PURPOSE:To acquire a solid-state image sensing device wherein smear is restrained without damaging driving stability of a CCD by providing a defect layer wherein carriers are recombined in a region which is not depleted during driving below a first conductivity type region, a first conductivity-type buried channel layer or a transfer gate of a second conductivity type well. CONSTITUTION:In a photosensitive part with a CCD vertical register, a P-type well 2 provided in the surface of an N-type silicon substrate 1 and a photoelectric conversion element including an N-type region 3 formed in a surface of the P-type well 2 are arranged in a plurality of lines. A plurality of transfer gate electrodes 8 thereof are arranged in a surface of the P-type well 2 with an N-type buried channel layer 5 formed apart from an N-type region and parallel to a photosensitive part and a gate insulation film 7 in a surface thereof between. Here, a defect layer 9 wherein carriers are recombined is provided to a region which is not depleted during driving below the N-type region 3, the N-type buried channel layer 5 or a transfer gate region 6 of a P-type well.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device.

[0002]

2. Description of the Related Art Conventionally, a CCD type solid-state image pickup device is shown in FIG.
It had the structure shown in. In FIG. 3, 1 is an N-type silicon substrate, 2 is a P-type well, 3 is an N-type region of a photoelectric conversion element, 4-1 and 4-2 are P ⁺ -type channel stoppers, and 5 is a signal transfer unit (CCD vertical register). ) N-type buried layer, 8
Is a transfer gate electrode of the CCD. The effective photoelectric conversion region is the N-type region 3, the P ⁺ -type regions (4-1, 4-2) and the active region around the N-type region in the P-type well 2. The N-type silicon substrate 1 is reverse biased with respect to the P-type well 2. Therefore, the negative charge generated in the depletion layer region formed between the N-type silicon substrate 1 and the P-type well 2 is
It is discharged to the N-type silicon substrate.

[0003]

In such a conventional structure, when light such as that shown in FIG. 3 is incident, for example, a region outside the active region (a region of the P-type well 2 that is not depleted during the operation of the solid-state imaging device). ) There is a problem that a part of the charges generated by photoelectric conversion in the lower portion enters the N-type buried layer 5 by diffusion and causes smear.

It is an object of the present invention to provide a solid-state image pickup device in which smear is suppressed without impairing the driving stability of CCD.

[0005]

According to the present invention, there is provided a second conductivity type well provided on a surface part of a first conductivity type semiconductor substrate, and a second conductivity type well selectively formed on the surface part of the second conductivity type well. 1
A photosensitive part in which photoelectric conversion elements including conductive type regions are arranged in a plurality of rows, and a first conductive type formed on the surface of the second conductive type well apart from the first conductive type region and in parallel with the photosensitive part. A CCD vertical register including a buried channel layer and a plurality of transfer gate electrodes arranged on the surface of the first conductivity type buried channel layer via a gate insulating film, and a signal charge is read from the photoelectric conversion element to the CCD vertical register. In a solid-state imaging device having a transfer gate for supplying carriers, carriers recombine in the first conductivity type region of the second conductivity type well, the first conductivity type buried channel layer, or a region below the transfer gate that is not depleted during driving. That is, a defective layer is provided.

[0006]

Since the defect layer functions as a recombination region of electron-hole pairs, it is possible to prevent electrons and holes generated outside the active region from flowing into the transfer gate region and the first conductivity type buried region. As a result, smear can be reduced.

[0007]

1 is a schematic sectional view of a CCD type solid-state image pickup device according to an embodiment of the present invention.

In this embodiment, the impurity concentration is 2 × 10 ¹⁴ / c.
Depth 2 provided on the surface of the m ³ N-type silicon substrate 1
-3 μm, impurity concentration 1 × 10 ¹⁵ -1 × 10 ¹⁶ / cm ³
Of the P-type well 2 and the N-type region 3 (thickness 0.5 to 1.0 μm, impurity concentration 2 × 10 ¹⁶ / cm ³ ) selectively formed on the surface of the P-type well 2. A photosensitive portion in which the conversion elements are arranged in a plurality of rows and an N-type buried channel layer 5 (depth 0.2 to 0) formed in parallel with the photosensitive portion apart from the N-type region on the surface portion of the P-type well 2. .3 μm, impurity concentration 1 × 10 ¹⁷ / cm ³ ) and a plurality of transfer gate electrodes 8 (such a transfer gate electrode in a direction perpendicular to the plane of the drawing) that is arranged via the gate insulating film 7 on the surface 5 of the N-type buried channel layer. And a transfer gate (a transfer gate region 6 and an overhanging portion of the transfer gate electrode 8 on the transfer gate region 6) that reads out signal charges from the photoelectric conversion element and supplies the signal charges to the CCD vertical register.
In the solid-state imaging device having the above, a defect layer 9 in which carriers recombine is provided below the N-type region 3, the N-type buried channel layer 5 or the transfer gate region 6 of the P-type well 2 in a region that is not depleted during driving. It is that.

A P ⁺ type channel stopper 4 on the N type region 3
-2 has a thickness of 0.1 to 0.2 μm and an impurity concentration of 1 × 1
It is 0 ¹⁸ / cm ³ .

Next, a method of forming the defect layer 9 will be described.

As shown in FIG. 2, a resist film 10 is formed after the formation of the N-type region 3 and the N-type buried channel layer 5 and the like, and using this as a mask, Si ions are at least 1 × 10 ¹³ / cm ² at 650 keV. Implantation and annealing at a temperature of 800 ° C. or less. The portion implanted with Si ions remains as a polycrystalline silicon region or an amorphous silicon region. A large number of recombination centers are present in the defect layer thus formed (which can be located at a depth of about 1 μm from the surface of the P-type well region 2).

The defect layer can also be formed by implanting atoms or molecules that are inactive in Si such as inactive ions such as argon in addition to Si. In this embodiment, the reverse bias voltage applied between the N-type silicon substrate 1 and the P-type well substrate 2 is about 8 V,
The pulse height of the voltage applied to the transfer gate electrode is about 9 volts.

Further, although the P-well type solid-state image pickup device has been described in the embodiment, it is obvious that the same effect can be obtained also in the N-well type solid-state image pickup device using the P-type substrate.

[0014]

As described above, according to the present invention, the smear can be suppressed by providing the defect layer at a position outside the active region in the well region of the solid-state image pickup device, and the image quality can be further improved. There is an effect that can be done.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention.

FIG. 2 is a cross-sectional view for explaining a method of forming a defect layer in an example.

FIG. 3 is a cross-sectional view showing a conventional example.

[Explanation of symbols]

1 N-type silicon substrate 2 P-type well 3 N-type region 4-1, 4-2 P ⁺ channel stopper 5 N-type buried channel 6 transfer gate region 7 gate insulating film 8 transfer gate electrode 9 defect layer 10 resist film

Claims (2)

[Claims] 1. A photoelectric conversion including a second conductivity type well provided on a surface part of a first conductivity type semiconductor substrate and a first conductivity type region selectively formed on a surface part of the second conductivity type well. A photosensitive portion in which elements are arranged in a plurality of rows; a first conductive type buried channel layer formed in parallel with the photosensitive portion on the surface portion of the second conductive type well apart from the first conductive type region; CCD including a plurality of transfer gate electrodes arranged on the surface of a conductive type buried channel layer via a gate insulating film
In a solid-state imaging device having a vertical register and a transfer gate for reading signal charges from the photoelectric conversion element and supplying the signal charges to the CCD vertical register, the first conductivity type region and the first conductivity type buried in the second conductivity type well. A solid-state imaging device comprising a defect layer in which carriers are recombined in a region which is not depleted during driving under a channel layer or a transfer gate. 2. The solid-state imaging device according to claim 1, wherein the defect layer is an amorphous layer or a polycrystalline layer.