JPH06268924A - Solid-state image pickup device and its drive method - Google Patents

Abstract

PURPOSE:To prevent flicker by impressing a pulse with opposite polarity to that of a read pulse to a transfer electrode not receiving the read pulse when a signal charge is read. CONSTITUTION:The signal charge integrated in a storage diode for a valid period is read to a vertical CCD via a read gate by adding a VFS to read pulses phiV1, phiV3. In this case, a VPN pulse of opposite polarity to the read pulse is added to pulses phiV2, phiV4. Moreover, the VPN is a voltage setting a substrate under the gate to be a positive hole storage state. In this case the drive pulses phiV1, phiV3 are impressed to a transfer electrode 14 and the drive pulses phiV2, phiV4 are impressed to a transfer electrode 18 and with the impression of the VPN, the potential of the pulses if fixed (pining) to 0V. That is, a channel stop 22 is electrically conductive by a 1st channel stop 11 whose potential is fixed and a positive hole and all regions are fixed (pining) to 0v.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device and its driving method.

[0002]

2. Description of the Related Art As a solid-state image sensor for high-definition
Attention has been focused on a photoconductive film-stacked solid-state imaging device. In this type of solid-state imaging device, since all the light incident on the device can be converted into electrons, a sensor with good sensitivity can be realized. Further, in this sensor, the sampling of spatial information is performed by the arrangement of the pixel electrodes formed on the lower side of the photoconductive film, so that it is sufficient if the pixel electrodes are arranged at equal intervals, and the pixel arrangement of the CCD scanning unit is free. It has the advantage of high degree. A plan view is shown in FIG. p-type semiconductor substrate 10
An n-type signal charge transfer section 101 and an n-type signal charge transfer section 21 are formed on the top. Further, a first channel stop 11 for separating the charge transfer portion 21 and a second channel stop 22 for separating the signal charge storage portion are formed. By arranging the two signal charge storage portions back to back as shown in the figure, the degree of integration in the vertical direction (vertical direction in the figure) can be improved. FIG. 4B shows a potential profile of the sectional view taken along the line AA '. The signal charge stored in the storage diode is read out to the signal charge transfer unit through the read gate. Next, the structure of this solid-state imaging device will be described with reference to the sectional view shown in FIG. Portions that overlap with FIG. 4 are omitted. Signal charge transfer electrodes 14 and 16 are formed via an insulating film formed on a semiconductor substrate. this house,
The transfer electrode 14 also serves as a signal reading gate. In the figure, the transfer electrodes 14 and 18 are broken to the left and right with the lead electrode as the center, but actually they are connected by bypassing the contact hole. After forming the insulating film 19, the contact hole is opened and the extraction electrode 24 is stored in the storage diode 21.
To be in contact with. The pixel electrode 27 is formed again via the insulating film, and the photoconductive film 28 and the transparent electrode 29 are formed on the pixel electrode 27.

However, such a solid-state image pickup device has a problem that when a read pulse is applied, a voltage is also applied to the element isolation portion and the potential thereof fluctuates. Normally, a contact 100 for fixing the substrate potential to 0 V is formed around the chip. When a read pulse is applied, the bias is applied not only to the storage diode 21 but also to the p-type channel stops 11 and 22, so that the potential of the p-type channel stop rises at the same time as the n-type storage diode. At that time, holes from the substrate contact 100 are injected into the channel stops 11 and 22 to cause a potential drop, and a reverse bias is applied between the storage diode 21 and the channel stop, and the signal charge is not applied to the vertical CCD for the first time.
Read out to 12. Further, since the channel stop potential fluctuates via the coupling capacitance with the transfer electrode, there is a problem that the potential fluctuates each time reading is performed and flicker occurs. That is, since the time constant represented by the product of the resistance of the channel stop portion and the coupling capacitance is very long, different pulse timings in the odd field and the even field affect the next field, and as a result, each field The amount of charge read out is different and flicker occurs. In particular, in a solid-state imaging device in which a so-called vertical overflow drain that sweeps excess charges to the substrate is formed by forming a well having a conductivity opposite to that of the substrate, the p-type well on the n-substrate is electrically floating. Therefore, the channel stop potential also floats and flicker becomes significant.

[0004]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to set the potential of a channel stop portion adjacent to a storage diode to 0V.
Fixed to prevent flicker.

[0005]

The present invention has been made in view of the above circumstances, and reads signal charges from a storage diode to a vertical CCD in order to prevent flicker and obtain a good reproduction screen. Sometimes a read pulse is applied line by line, but at the same time a pulse with the opposite polarity to that pulse is applied to the electrodes to which no read pulse is applied.

When reading out the signal charge within the vertical blanking period, 1
A read pulse is applied to each line, and a negative pulse is applied to the remaining lines to make a hole accumulation state under the gate and fix the potential to 0V. The potential of the first channel stop and the second channel stop whose potentials are always fixed are fixed to 0v through the hole accumulation layer on the vertical CCD. Therefore, since the channel stop potential at the time of signal reading is always fixed, the potential does not fluctuate and flicker does not occur each time reading is performed.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a diagram for explaining one embodiment of the present invention. FIG. 1 is a diagram illustrating in detail one embodiment according to the present invention. A p-type well 101 is formed on an n-type semiconductor substrate 10, and then a signal charge transfer section and a signal charge storage section are formed by a method such as ion implantation. Also, the substrate
Form p-type channel stops 11 and 22 on 10.
The channel stops 11 and 22 are formed in a predetermined plane pattern. The signal charge storage unit and the signal charge transfer unit are not shown in FIG. After that, an insulating film is formed on the semiconductor substrate 10 by a method such as thermal oxidation. The insulating film may be formed by forming a plurality of insulating films such as silicon nitride. Next, a thin film of polycrystalline silicon or the like is formed by a method such as a CVD method, and the first transfer electrode 14 is etched into a desired pattern.
To form. After forming an oxide film on the surface of the transfer electrode 14, the second transfer electrode 18 is formed by the same method. Here, the first transfer electrode also serves as the read gate, but the second transfer electrode may be used as the read gate. Next, a flattening film such as BPSG is formed. After that, contact holes are opened on the storage diode 21 and the second channel stop 11, and contact wirings 24 and 25 with the semiconductor substrate are formed by polycide such as tungsten or molybdenum. In the figure,
The transfer electrodes 14 and 18 are shown separately with the contact wiring 25 as the center, but this is because it shows a cross section at the center of the contact hole and extends in the horizontal direction. The wiring 25 is drawn out of the chip and the substrate potential is 0.
fixed to v. Further, a second flattening film 19 is formed, a contact hole is opened on the extraction electrode 24, and a pixel electrode 27 is formed. After that, a photoconductive film and a transparent electrode are formed by a known method to obtain the solid-state imaging device of the present invention. FIG. 2 shows a read pulse applied to the transfer electrode within the vertical blanking period. φV1, φV2, φV3
And φv4 are four-phase drive pulses applied to the transfer electrodes. In FIG. 2, it is assumed that v1 and v3 are read. The signal charge integrated in the storage diode within the effective period is read out to the vertical CCD through the read gate by applying V _FS to the read pulses φV1 and φV3. At this time, a V _PN pulse having a polarity opposite to that of the read pulse is applied as φV2 and φV4. V _PN is a voltage for bringing holes into the substrate under the gate.

FIG. 3 is a plan view illustrating an embodiment of the present invention. In FIG. 3, components formed after the flattening film 18 are omitted except for the contact holes 24 and 25.
φV1 and φV3 are drive pulses applied to the transfer electrode 14, and φV2 and φv4 are drive pulses applied to the transfer electrode 18. The cross-sectional view of FIG. 3A is shown as a cross section of BB ′ in FIG. When VPN is applied, the filled portion in FIG. 3A is in the hole accumulation state, and its potential is fixed (pinned) to 0 v. In the plane state, the potential is the shaded portion in FIG. That is, the channel stop 22 is electrically connected to the first channel stop 11 whose potential is fixed by the hole accumulation layer, and is fixed (pinned) to 0v in all the regions in the diagonal line. As a result, a reverse bias is applied between the storage diode 21 and the second channel stop 22 at the same time as the application of the signal charge read pulses φV1 and φV3, and there is no fluctuation of the potential through the coupling capacitance, so that flicker occurs. You can get a perfect playback screen.

[0009]

As described above, according to the present invention, when the signal charge is read, the transfer diode to which the read pulse is not applied is applied to the transfer electrode, and the pulse having the opposite polarity to the read pulse is applied to the storage diode. Since the potentials of adjacent channel stops can be fixed to 0v, a good playback screen without flicker can be obtained.

[Brief description of drawings]

1 is a cross-sectional view of an embodiment according to the present invention.

FIG. 2 is a timing chart illustrating a driving method according to an embodiment of the present invention.

FIG. 3 is a structural view showing a plane and a cross section of an embodiment according to the present invention.

FIG. 4 is a plan view illustrating a conventional technique.

FIG. 5 is a sectional view illustrating a conventional technique.

[Explanation of symbols]

 10 n-type silicon substrate 11 channel stop 12 CCD channel 14 first transfer electrode 16 transfer gate 18 second transfer electrode 19 flattening film (insulating layer) 21 storage diode

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Shinji Osawa, 1 Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi, Kanagawa Inside the Toshiba Research and Development Center, a stock company (72) Inventor Hiroshi Yamashita Komukai-Toshiba, Kawasaki-shi, Kanagawa Town No. 1 In the Corporate Research & Development Center, Toshiba Corporation (72) Inventor Yoshito Koya No. 580-1, Horikawa-cho, Saiwai-ku, Kawasaki-shi, Kanagawa Inside the Toshiba Semiconductor System Technology Center

Claims (4)

[Claims] 1. A plurality of signal charge storage units formed on a semiconductor substrate having one conductivity type and having a conductivity type opposite to that of the semiconductor substrate, and a signal charge transfer unit having a conductivity type opposite to that of the semiconductor substrate; A signal charge reading unit that reads signal charges from the signal charge storage unit to the signal charge transfer unit, and a semiconductor substrate adjacent to the signal charge transfer unit and having a conductivity opposite to that of the semiconductor substrate that separates the signal charge transfer unit. A channel stop region, and a second channel stop part that is formed so as to surround the signal charge storage part except the signal charge reading part and separates the signal charge storage part in the vertical direction from each other; In the solid-state imaging device, which is formed via an insulating film on a substrate and includes a plurality of signal charge transfer electrodes for applying a signal charge transfer pulse and a signal charge read pulse, A solid-state imaging device comprising means for applying a DC voltage to the channel stop section of the above. 2. A plurality of signal charge storage units formed on a semiconductor substrate having one conductivity type and having a conductivity type opposite to that of the semiconductor substrate, and a signal charge transfer unit having a conductivity type opposite to that of the semiconductor substrate. It has the same conductivity as the signal charge reading unit that reads the signal charges from the signal charge storage unit to the signal charge transfer unit and the semiconductor substrate that is adjacent to the signal charge transfer unit and separates the signal charge transfer unit. A first channel stop region, and a second channel stop part that is formed so as to surround the signal charge storage part except the signal charge reading part and separates the signal charge storage part in the vertical direction from each other. Signal charge readout of a solid-state imaging device including a signal charge transfer pulse formed through an insulating film on the semiconductor substrate, and a plurality of signal charge transfer electrodes for applying a signal charge read pulse A method for driving a solid-state imaging device, wherein a pulse having a polarity opposite to that of the signal charge reading pulse is applied to a transfer electrode to which the signal charge reading pulse is not applied. 3. A plurality of signal charge storage units formed on a semiconductor substrate having one conductivity type and having a conductivity type opposite to that of the semiconductor substrate, and a signal charge transfer unit having a conductivity type opposite to that of the semiconductor substrate. It has the same conductivity as the signal charge reading unit that reads the signal charges from the signal charge storage unit to the signal charge transfer unit and the semiconductor substrate that is adjacent to the signal charge transfer unit and separates the signal charge transfer unit. A first channel stop region, and a second channel stop part that is formed so as to surround the signal charge storage part except the signal charge reading part and separates the signal charge storage part in the vertical direction from each other. A plurality of signal charge transfer electrodes that are formed via the insulating film on the semiconductor substrate and that apply a signal charge transfer pulse and a signal charge read pulse, and read the signal charge when reading the signal charge In a solid-state imaging device in which a pulse having a polarity opposite to that of the signal charge reading pulse is applied to a transfer electrode to which a seepage pulse is not applied, the semiconductor substrate has the same conductive state as the semiconductor substrate due to the pulse having the opposite polarity. The solid-state imaging device according to claim 1. 4. A plurality of signal charge storage units formed on a semiconductor substrate having one conductivity type and having a conductivity type opposite to that of the semiconductor substrate, and a signal charge transfer unit having a conductivity type opposite to that of the semiconductor substrate. It has the same conductivity as the signal charge reading unit that reads the signal charges from the signal charge storage unit to the signal charge transfer unit and the semiconductor substrate that is adjacent to the signal charge transfer unit and separates the signal charge transfer unit. A first channel stop region, and a second channel stop part that is formed so as to surround the signal charge storage part except the signal charge reading part and separates the signal charge storage part in the vertical direction from each other. A plurality of signal charge transfer electrodes that are formed via the insulating film on the semiconductor substrate and that apply a signal charge transfer pulse and a signal charge read pulse, and read the signal charge when reading the signal charge Solid-state imaging in which a pulse having a polarity opposite to that of the signal charge reading pulse is applied to a transfer electrode to which a projecting pulse is not applied, and the pulse having the opposite polarity causes the semiconductor substrate to have an accumulation state of the same conductivity as the semiconductor substrate. The solid-state imaging device according to claim 1, wherein the first channel stop part and the second channel stop part are in a conductive level depending on the storage state.