JP2892912B2 - Inspection method for solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for inspecting a solid-state imaging device which can be used for an integrated video camera or the like.

[0002]

2. Description of the Related Art In recent years, solid-state imaging devices have been widely put to practical use in imaging units of integrated video cameras. In particular, an interline transfer type CCD (Charge Coupled Device) type solid-state imaging device (hereinafter referred to as IT-CCD) has attracted attention because of its low noise characteristics. The number of products produced is increasing year by year, and there is a strong demand for a high-speed inspection and a technique for simultaneously measuring a plurality of elements.

Hereinafter, a conventional method for inspecting a solid-state imaging device will be described with reference to the drawings. FIG. 4 is a schematic view showing a conventional method for inspecting a solid-state imaging device, and FIG.
It is sectional drawing which followed the -a line.

In FIGS. 4 and 5, reference numeral 1 denotes a photodiode having a photoelectric conversion function;
An enhancement MOS transistor which functions as a read gate for reading out signal charges stored in the memory, 3 is a vertical transfer section having a buried channel configuration for transferring signal charges, 4 is a transfer gate for controlling the vertical transfer section 3, and 5 is horizontal transfer Reference numeral 6 denotes an output unit. 7 is an n-type semiconductor substrate, 8
Is a first element, 9 is a second element, 10 is a reference electrode of the first element 8, and 11 is a reference electrode of the second element 9.

The vertical transfer section 3 has a four-gate one-bit configuration in which one bit is formed including four transfer gates 4 adjacent in the vertical direction. The vertical transfer unit 3
Has a configuration in which two read gates are provided per bit. Further, the transfer gate 4 to form each bit, pulse application electrodes G ₁ ~G ₄ is connected.
The electrodes G ₁ and G ₃ are also connected to a MOS transistor 2 which is a read gate. Elements 1 to 6 constitute first and second elements 8 and 9.

[0006] Pulses φ _G1 , φ _G2 , φ _G3 and φ _G4 are applied to the electrodes G ₁ , G ₂ , G ₃ and G ₄ , respectively. The pulse φ _G1 applied to the electrode G ₁ and the pulse φ _G3 applied to the electrode G ₃ control read and transfer. At the time of high (H) level, reading is performed, and at the time of middle (M) level and low (L) level, transfer is performed. Electrode G ₂
It applied to the pulse phi _G4 applied to the pulse phi _G2 electrode G ₄
Controls the transfer, and the transfer is performed at the high (H) level and the low (L) level.

First, the voltage of the n-type semiconductor substrate 7 is set to a value that suppresses blooming. Next, at times t ₁ and t ₂ , the pulses φ _G1 and φ _G3 go high (H) level, and the signal charges accumulated in the photodiode 1 are read out to the vertical transfer unit 3. Thereafter, two signal charges adjacent to each other in the vertical direction are mixed. Next, at time t _3, the pulse φ _G1 ,
φ _G2 , φ _G3 , and φ _G4 are transfer periods, and signal charges are transferred one by one during a horizontal scanning blanking period, and further output via the horizontal transfer unit 5 and the output unit 6. Read the output voltage and inspect the device. Next, the second element is inspected in the same manner.

[0008]

In the conventional method for inspecting a solid-state imaging device as described above, the set value of the voltage of the n-type semiconductor substrate 7 differs between the first device and the second device when the first device and the second device are tested. In addition, a voltage to be applied to the same n-type semiconductor substrate 7 cannot be set at the same time. Therefore, there has been a problem that the inspection of a plurality of elements cannot be performed at the same time, and the inspection time becomes extremely long.

[0009]

According to the present invention, there is provided a method for inspecting a solid-state imaging device, comprising the steps of: forming a plurality of wells of a second conductivity type formed on a semiconductor substrate of a first conductivity type; A photoelectric conversion unit having a photoelectric conversion function formed on each of the wells, a vertical transfer unit that transfers charges photoelectrically converted by the photoelectric conversion unit in a column direction, and the photoelectric conversion unit and the vertical transfer unit. A read switch unit that controls reading of signal charges accumulated in the photoelectric conversion unit by coupling the signal charges, a horizontal transfer unit that transfers the signal charges in a row direction, and an output unit that extracts the signal charges. A voltage applied to the well is set to a voltage for suppressing the signal charge with reference to a voltage of the first conductivity type semiconductor substrate.

[0010]

According to the above configuration, it is possible to set a voltage for suppressing excess charge without changing the voltage condition of each terminal on the well at a common substrate voltage, and it is possible to measure a plurality of elements at the same time.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram schematically showing a configuration of a solid-state imaging device for explaining an inspection method according to an embodiment of the present invention.

In FIG. 1, 1 is a photodiode having a photoelectric conversion function, 2 is an enhancement MOS transistor functioning as a read gate for reading out signal charges stored in the photodiode 1, and 3 is a buried channel for transferring signal charges. The vertical transfer unit 4 has a transfer gate for controlling the vertical transfer unit 3, the horizontal transfer unit 5,
Reference numeral 6 denotes an output unit. 7 is an n-type semiconductor substrate, 8 is a first element, 9 is a second element, 10 is a reference electrode of the first element, 1
1 is a reference electrode of the second element.

The vertical transfer unit 3 has a four-gate one-bit configuration in which one bit is formed including four transfer gates 4 adjacent in the vertical direction. The vertical transfer unit 3
Has a configuration in which two read gates are provided per bit. Further, the transfer gate 4 to form each bit, pulse application electrodes G ₁ ~G ₄ is connected.
The electrodes G ₁ and G ₃ are also connected to a MOS transistor 2 which is a read gate. These components 1 to 6 constitute first and second elements.

FIG. 2 is a sectional view taken along the line bb of FIG. 1, and FIG. 3 is a pulse φ _G1 , φ _G2 , φ _G3 , φ _G3 applied to the electrodes G ₁ , G ₂ , G ₃ , G ₄ respectively. FIG. 6 is a timing chart of _φG4 .

The pulse φ _G1 applied to the electrode G ₁ and the pulse φ _G3 applied to the electrode G ₃ control reading and transferring. Reading is performed at the high (H) level, and transfer is performed at the middle (M) level and the low (L) level. The pulse φ _G2 applied to the electrode G ₂ and the pulse φ _G4 applied to the electrode G ₄ control the transfer, and the transfer is performed at the high (H) level and the low (L) level.

The solid-state imaging device configured as described above is
The operation will be described below. First, an n-type semiconductor substrate
Voltage applied to the reference electrode of the first element based on the voltage of 7
Is set to a value at which blooming is suppressed. Then the time
t₁, T_TwoWhen the pulse φ _G1, Φ_G3Is higher than the reference voltage.
(H) level and is stored in the photodiode 1.
The transferred signal charges are read out to the vertical transfer unit 3. Then droop
Two signal charges that are in the direct direction are mixed. next
Time t_Three, The pulse φ_G1, Φ_G2, Φ_G3, Φ_G4Is transferred
Period, and the signal charge becomes one in one horizontal blanking period.
Transferred step by step. Further, the horizontal transfer unit 5 and the output unit
6 is output. Read its output voltage and
Inspect the device. At this time, the second element is
And inspect.

As described above, in this embodiment, the inspection of the second element can be performed at the same time as the first element.

Although the embodiment is described using the IT-CCD, the frame transfer method (FT-CC) is used.
Similar effects can be obtained for the imaging device D).

[0020]

According to the present invention, it is possible to simultaneously measure a plurality of solid-state imaging devices, and to speed up the inspection.

[Brief description of the drawings]

FIG. 1 is a plan view of a solid-state imaging device for explaining an inspection method according to an embodiment of the present invention.

FIG. 2 is a sectional view taken along the line bb in FIG. 1;

FIG. 3 is a drive pulse timing chart of the solid-state imaging device according to one embodiment of the present invention;

FIG. 4 is a plan view of a solid-state imaging device for explaining a conventional inspection method.

FIG. 5 is a cross-sectional view of the solid-state imaging device along the line aa in FIG. 4;

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 photodiode 2 MOS transistor 3 vertical transfer unit 4 transfer gate 5 horizontal transfer unit 6 output unit 7 n-type semiconductor substrate 8 first element 9 second element 10 reference electrode of first element 8 11 second element 9 reference electrodes

Continuation of front page (56) References JP-A-4-218966 (JP, A) JP-A-60-244064 (JP, A) JP-A-63-73659 (JP, A) JP-A-53-7121 (JP, A) , A) JP-A-62-97369 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H04N 5/30-5/335

Claims (1)

(57) [Claims] 1. A plurality of wells of a second conductivity type formed on a semiconductor substrate of a first conductivity type, a photoelectric conversion unit having a photoelectric conversion function formed on each of the wells, and the photoelectric conversion unit A vertical transfer unit that transfers the photoelectrically converted charges in the column direction, and a read switch unit that controls reading of signal charges accumulated in the photoelectric conversion unit by combining the photoelectric conversion unit and the vertical transfer unit. A solid-state imaging device including a horizontal transfer unit for transferring the signal charges in a row direction and an output unit for extracting the signal charges, wherein the solid-state image sensor is applied to the well based on the voltage of the first conductive type semiconductor substrate. A method for inspecting a solid-state imaging device, wherein a voltage is set to a voltage for suppressing the signal charge.