JP2804446B2 - 集積回路デバイスの形成方法 - Google Patents

集積回路デバイスの形成方法

Info

Publication number
JP2804446B2
JP2804446B2 JP6300507A JP30050794A JP2804446B2 JP 2804446 B2 JP2804446 B2 JP 2804446B2 JP 6300507 A JP6300507 A JP 6300507A JP 30050794 A JP30050794 A JP 30050794A JP 2804446 B2 JP2804446 B2 JP 2804446B2
Authority
JP
Japan
Prior art keywords
oxide
deposition
resist
forming
semiconductor material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP6300507A
Other languages
English (en)
Japanese (ja)
Other versions
JPH07201979A (ja
Inventor
キャロル・ガリ
ルイス・ルー−チェン・スー
セイキ・オグラ
ジョセフ・フランシス・シェパード
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPH07201979A publication Critical patent/JPH07201979A/ja
Application granted granted Critical
Publication of JP2804446B2 publication Critical patent/JP2804446B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP6300507A 1993-12-23 1994-12-05 集積回路デバイスの形成方法 Expired - Lifetime JP2804446B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US17339693A 1993-12-23 1993-12-23
US173396 1998-10-15

Publications (2)

Publication Number Publication Date
JPH07201979A JPH07201979A (ja) 1995-08-04
JP2804446B2 true JP2804446B2 (ja) 1998-09-24

Family

ID=22631817

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6300507A Expired - Lifetime JP2804446B2 (ja) 1993-12-23 1994-12-05 集積回路デバイスの形成方法

Country Status (7)

Country Link
US (1) US5516721A (OSRAM)
EP (1) EP0660390A3 (OSRAM)
JP (1) JP2804446B2 (OSRAM)
KR (1) KR0167813B1 (OSRAM)
BR (1) BR9405158A (OSRAM)
CA (1) CA2131668C (OSRAM)
TW (1) TW265457B (OSRAM)

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US6300219B1 (en) * 1999-08-30 2001-10-09 Micron Technology, Inc. Method of forming trench isolation regions
US6221735B1 (en) * 2000-02-15 2001-04-24 Philips Semiconductors, Inc. Method for eliminating stress induced dislocations in CMOS devices
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US6429061B1 (en) * 2000-07-26 2002-08-06 International Business Machines Corporation Method to fabricate a strained Si CMOS structure using selective epitaxial deposition of Si after device isolation formation
US6613641B1 (en) * 2001-01-17 2003-09-02 International Business Machines Corporation Production of metal insulator metal (MIM) structures using anodizing process
US6605506B2 (en) * 2001-01-29 2003-08-12 Silicon-Based Technology Corp. Method of fabricating a scalable stacked-gate flash memory device and its high-density memory arrays
WO2002101818A2 (en) * 2001-06-08 2002-12-19 Amberwave Systems Corporation Method for isolating semiconductor devices
WO2003025984A2 (en) * 2001-09-21 2003-03-27 Amberwave Systems Corporation Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same
WO2003028106A2 (en) 2001-09-24 2003-04-03 Amberwave Systems Corporation Rf circuits including transistors having strained material layers
US7060633B2 (en) * 2002-03-29 2006-06-13 Texas Instruments Incorporated Planarization for integrated circuits
KR100864845B1 (ko) * 2002-07-03 2008-10-23 매그나칩 반도체 유한회사 반도체소자의 소자분리막 제조방법
US6593221B1 (en) * 2002-08-13 2003-07-15 Micron Technology, Inc. Selective passivation of exposed silicon
EP1602125B1 (en) 2003-03-07 2019-06-26 Taiwan Semiconductor Manufacturing Company, Ltd. Shallow trench isolation process
US6767786B1 (en) * 2003-04-14 2004-07-27 Nanya Technology Corporation Method for forming bottle trenches by liquid phase oxide deposition
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US7125815B2 (en) * 2003-07-07 2006-10-24 Micron Technology, Inc. Methods of forming a phosphorous doped silicon dioxide comprising layer
US7273794B2 (en) * 2003-12-11 2007-09-25 International Business Machines Corporation Shallow trench isolation fill by liquid phase deposition of SiO2
US7053010B2 (en) * 2004-03-22 2006-05-30 Micron Technology, Inc. Methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming arrays of memory cells
US7074690B1 (en) * 2004-03-25 2006-07-11 Novellus Systems, Inc. Selective gap-fill process
US7582555B1 (en) 2005-12-29 2009-09-01 Novellus Systems, Inc. CVD flowable gap fill
US7524735B1 (en) 2004-03-25 2009-04-28 Novellus Systems, Inc Flowable film dielectric gap fill process
US9257302B1 (en) 2004-03-25 2016-02-09 Novellus Systems, Inc. CVD flowable gap fill
US7235459B2 (en) * 2004-08-31 2007-06-26 Micron Technology, Inc. Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry
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US7510966B2 (en) * 2005-03-07 2009-03-31 Micron Technology, Inc. Electrically conductive line, method of forming an electrically conductive line, and method of reducing titanium silicide agglomeration in fabrication of titanium silicide over polysilicon transistor gate lines
US8012847B2 (en) 2005-04-01 2011-09-06 Micron Technology, Inc. Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry
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CN101452873B (zh) * 2007-12-06 2010-08-11 上海华虹Nec电子有限公司 浅沟槽隔离工艺方法
US8557712B1 (en) 2008-12-15 2013-10-15 Novellus Systems, Inc. PECVD flowable dielectric gap fill
US8278224B1 (en) 2009-09-24 2012-10-02 Novellus Systems, Inc. Flowable oxide deposition using rapid delivery of process gases
US8105956B2 (en) * 2009-10-20 2012-01-31 Micron Technology, Inc. Methods of forming silicon oxides and methods of forming interlevel dielectrics
KR101758944B1 (ko) 2009-12-09 2017-07-18 노벨러스 시스템즈, 인코포레이티드 신규한 갭 충진 집적화
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US8846536B2 (en) 2012-03-05 2014-09-30 Novellus Systems, Inc. Flowable oxide film with tunable wet etch rate
CN103632961B (zh) * 2012-08-20 2016-08-10 上海华虹宏力半导体制造有限公司 功率mosfet芯片保护结构制造方法
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JP6573575B2 (ja) * 2016-05-02 2019-09-11 東京エレクトロン株式会社 凹部の埋め込み方法
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Also Published As

Publication number Publication date
CA2131668C (en) 1999-03-02
JPH07201979A (ja) 1995-08-04
BR9405158A (pt) 1995-08-01
US5516721A (en) 1996-05-14
CA2131668A1 (en) 1995-06-24
EP0660390A2 (en) 1995-06-28
TW265457B (OSRAM) 1995-12-11
EP0660390A3 (en) 1997-07-09
KR0167813B1 (ko) 1999-02-01
KR950021405A (ko) 1995-07-26

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