JP2551737B2 - 接着剤をマイクロ電子チップに塗布して半導体集積回路を作る方法 - Google Patents

接着剤をマイクロ電子チップに塗布して半導体集積回路を作る方法

Info

Publication number
JP2551737B2
JP2551737B2 JP6223159A JP22315994A JP2551737B2 JP 2551737 B2 JP2551737 B2 JP 2551737B2 JP 6223159 A JP6223159 A JP 6223159A JP 22315994 A JP22315994 A JP 22315994A JP 2551737 B2 JP2551737 B2 JP 2551737B2
Authority
JP
Japan
Prior art keywords
adhesive
chip
wafer
integrated circuit
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP6223159A
Other languages
English (en)
Japanese (ja)
Other versions
JPH07153790A (ja
Inventor
チョ ジェ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NASHONARU SUTAACHI ANDO CHEM INBESUTOMENTO HOORUDEINGU CORP
Original Assignee
NASHONARU SUTAACHI ANDO CHEM INBESUTOMENTO HOORUDEINGU CORP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NASHONARU SUTAACHI ANDO CHEM INBESUTOMENTO HOORUDEINGU CORP filed Critical NASHONARU SUTAACHI ANDO CHEM INBESUTOMENTO HOORUDEINGU CORP
Publication of JPH07153790A publication Critical patent/JPH07153790A/ja
Application granted granted Critical
Publication of JP2551737B2 publication Critical patent/JP2551737B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H10W70/415—Leadframe inner leads serving as die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Die Bonding (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Adhesives Or Adhesive Processes (AREA)
JP6223159A 1993-09-28 1994-09-19 接着剤をマイクロ電子チップに塗布して半導体集積回路を作る方法 Expired - Fee Related JP2551737B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12753893A 1993-09-28 1993-09-28
US127538 1993-09-28

Publications (2)

Publication Number Publication Date
JPH07153790A JPH07153790A (ja) 1995-06-16
JP2551737B2 true JP2551737B2 (ja) 1996-11-06

Family

ID=22430635

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6223159A Expired - Fee Related JP2551737B2 (ja) 1993-09-28 1994-09-19 接着剤をマイクロ電子チップに塗布して半導体集積回路を作る方法

Country Status (5)

Country Link
EP (1) EP0645813A3 (enExample)
JP (1) JP2551737B2 (enExample)
KR (1) KR0144290B1 (enExample)
CN (1) CN1108810A (enExample)
TW (1) TW263611B (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1101597C (zh) * 1996-11-08 2003-02-12 三星电子株式会社 片上引线式半导体芯片封装及其制作方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0158868B1 (ko) * 1988-09-20 1998-12-01 미다 가쓰시게 반도체장치
JPH02146758A (ja) * 1988-11-28 1990-06-05 Nec Corp 樹脂封止型半導体装置
US5242713A (en) * 1988-12-23 1993-09-07 International Business Machines Corporation Method for conditioning an organic polymeric material
US5112942A (en) * 1990-09-26 1992-05-12 Ethyl Corporation Polymide compositions
US5448450A (en) * 1991-08-15 1995-09-05 Staktek Corporation Lead-on-chip integrated circuit apparatus
JPH05129469A (ja) * 1991-10-31 1993-05-25 Nec Corp 樹脂封止型半導体装置
US5286679A (en) * 1993-03-18 1994-02-15 Micron Technology, Inc. Method for attaching a semiconductor die to a leadframe using a patterned adhesive layer

Also Published As

Publication number Publication date
KR950009894A (ko) 1995-04-26
EP0645813A3 (en) 1996-03-13
KR0144290B1 (ko) 1998-08-17
TW263611B (enExample) 1995-11-21
EP0645813A2 (en) 1995-03-29
CN1108810A (zh) 1995-09-20
JPH07153790A (ja) 1995-06-16

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