JP2520612Y2 - 樹脂封止型半導体装置 - Google Patents

樹脂封止型半導体装置

Info

Publication number
JP2520612Y2
JP2520612Y2 JP1990044402U JP4440290U JP2520612Y2 JP 2520612 Y2 JP2520612 Y2 JP 2520612Y2 JP 1990044402 U JP1990044402 U JP 1990044402U JP 4440290 U JP4440290 U JP 4440290U JP 2520612 Y2 JP2520612 Y2 JP 2520612Y2
Authority
JP
Japan
Prior art keywords
resin
die pad
semiconductor chip
thickness
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1990044402U
Other languages
English (en)
Japanese (ja)
Other versions
JPH044767U (en, 2012
Inventor
信行 田中
知志 大出
晴彦 牧野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP1990044402U priority Critical patent/JP2520612Y2/ja
Publication of JPH044767U publication Critical patent/JPH044767U/ja
Application granted granted Critical
Publication of JP2520612Y2 publication Critical patent/JP2520612Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Landscapes

  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1990044402U 1990-04-24 1990-04-24 樹脂封止型半導体装置 Expired - Fee Related JP2520612Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990044402U JP2520612Y2 (ja) 1990-04-24 1990-04-24 樹脂封止型半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990044402U JP2520612Y2 (ja) 1990-04-24 1990-04-24 樹脂封止型半導体装置

Publications (2)

Publication Number Publication Date
JPH044767U JPH044767U (en, 2012) 1992-01-16
JP2520612Y2 true JP2520612Y2 (ja) 1996-12-18

Family

ID=31557672

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990044402U Expired - Fee Related JP2520612Y2 (ja) 1990-04-24 1990-04-24 樹脂封止型半導体装置

Country Status (1)

Country Link
JP (1) JP2520612Y2 (en, 2012)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2647900B2 (ja) * 1988-05-12 1997-08-27 株式会社日立製作所 面実装超薄形半導体装置

Also Published As

Publication number Publication date
JPH044767U (en, 2012) 1992-01-16

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees